From: James Greenhalgh <james.greenhalgh@arm.com>
To: "Hurugalawadi, Naveen" <Naveen.Hurugalawadi@cavium.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>,
Richard Earnshaw <Richard.Earnshaw@arm.com>,
Marcus Shawcroft <marcus.shawcroft@arm.com>, <nd@arm.com>
Subject: Re: [PATCH][AArch64] vec_pack_trunc_<mode> should split after register allocator
Date: Fri, 21 Jul 2017 16:42:00 -0000 [thread overview]
Message-ID: <20170721164242.GA8905@arm.com> (raw)
In-Reply-To: <CO2PR07MB269403580E746EEDF703939383100@CO2PR07MB2694.namprd07.prod.outlook.com>
On Thu, Apr 27, 2017 at 05:08:38AM +0000, Hurugalawadi, Naveen wrote:
> Hi,
>
> The instruction "vec_pack_trunc_<mode>" should be split after register
> allocator for scheduling reasons. Currently the instruction is marked as type
> multiple which means it will scheduled as single issued. However, nothing can
> be scheduled with either xtn/xtn2 which is a problem in some cases.
What's the reason for splitting this only after reload? I think we can
split this whenever we like, and that there isn't any benefit in keeping
the pair together?
Am I missing something?
Thanks,
James
>
> The patch splits the instruction and fixes the issue.
>
> Please review the patch and let me know if its okay.
> Bootstrapped and Regression tested on aarch64-thunder-linux.
>
> 2017-04-27 Naveen H.S <Naveen.Hurugalawadi@cavium.com>
>
> * config/aarch64/aarch64-simd.md
> (aarch64_simd_vec_pack_trunc_hi_<mode>): New pattern.
> (vec_pack_trunc_<mode>): Split the instruction pattern.
next prev parent reply other threads:[~2017-07-21 16:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-27 7:37 Hurugalawadi, Naveen
2017-05-11 5:43 ` [PING] [PATCH] [AArch64] " Hurugalawadi, Naveen
2017-05-26 6:27 ` [PING 2] " Hurugalawadi, Naveen
2017-06-15 3:49 ` [PING 3] " Hurugalawadi, Naveen
2017-06-30 6:29 ` [PING 4] " Hurugalawadi, Naveen
2017-07-19 2:57 ` [PING 5] " Hurugalawadi, Naveen
2017-07-21 16:42 ` James Greenhalgh [this message]
2017-07-25 7:30 ` [PATCH][AArch64] " Hurugalawadi, Naveen
2017-07-25 8:57 ` James Greenhalgh
2017-07-25 11:40 ` Hurugalawadi, Naveen
[not found] ` <CO2PR07MB26932740F6783B49FB886B7983890@CO2PR07MB2693.namprd07.prod.outlook.com>
2017-08-11 6:09 ` [PING] [PATCH] [AArch64] " Hurugalawadi, Naveen
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