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From: Jakub Jelinek <jakub@redhat.com>
To: Segher Boessenkool <segher@kernel.crashing.org>
Cc: Richard Biener <rguenther@suse.de>,
	Uros Bizjak <ubizjak@gmail.com>,
	       David Edelsohn <dje.gcc@gmail.com>,
	       Marcus Shawcroft <marcus.shawcroft@arm.com>,
	       Richard Earnshaw <richard.earnshaw@arm.com>,
	       Andreas Krebbel <Andreas.Krebbel@de.ibm.com>,
	       Matthew Fortune <matthew.fortune@imgtec.com>,
	       Eric Botcazou <ebotcazou@libertysurf.fr>,
	       Andrew Jenner <andrew@codesourcery.com>,
	gcc-patches@gcc.gnu.org
Subject: Re: [PATCH] Switch vec_init and vec_extract optabs to 2 mode optab to allow extraction of vector from vector or initialization of vector from smaller vectors (PR target/80846)
Date: Tue, 01 Aug 2017 16:21:00 -0000	[thread overview]
Message-ID: <20170801162134.GY2123@tucnak> (raw)
In-Reply-To: <20170726114123.GN13471@gate.crashing.org>

On Wed, Jul 26, 2017 at 06:41:23AM -0500, Segher Boessenkool wrote:
> > That is to follow aarch64 iterator naming convention, where they have
> 
> Ugh, for some reason I thought this was in rs6000/ as well.  I have
> fresh coffee now.  Sorry.

Apparently I broke power bootstrap with this, because two new spots were
introduced after I wrote the patch and my cross-compiler which didn't have
HAVE_AS_POWER9 defined didn't reveal that.  Fixed thusly, committed as
obvious to trunk:

2017-08-01  Jakub Jelinek  <jakub@redhat.com>

	PR target/80846
	* config/rs6000/vsx.md (vextract_fp_from_shorth,
	vextract_fp_from_shortl): Add element mode after mode in gen_vec_init*
	calls.

--- gcc/config/rs6000/vsx.md.jj	2017-07-28 09:10:49.000000000 +0200
+++ gcc/config/rs6000/vsx.md	2017-08-01 18:04:50.000000000 +0200
@@ -4523,7 +4523,7 @@ (define_expand "vextract_fp_from_shorth"
      inputs in half words 1,3,5,7 (IBM numbering).  Use xxperm to move
      src half words 0,1,2,3 for the conversion instruction.  */
   v = gen_rtvec_v (16, rvals);
-  emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));
+  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
   emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],
 					  operands[1], mask));
   emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp));
@@ -4552,7 +4552,7 @@ (define_expand "vextract_fp_from_shortl"
      inputs in half words 1,3,5,7 (IBM numbering).  Use xxperm to move
      src half words 4,5,6,7 for the conversion instruction.  */
   v = gen_rtvec_v (16, rvals);
-  emit_insn (gen_vec_initv16qi (mask, gen_rtx_PARALLEL (V16QImode, v)));
+  emit_insn (gen_vec_initv16qiqi (mask, gen_rtx_PARALLEL (V16QImode, v)));
   emit_insn (gen_altivec_vperm_v8hiv16qi (tmp, operands[1],
 					  operands[1], mask));
   emit_insn (gen_vsx_xvcvhpsp (operands[0], tmp));


	Jakub

  reply	other threads:[~2017-08-01 16:21 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-25  9:14 Jakub Jelinek
2017-07-25 21:12 ` Segher Boessenkool
2017-07-26  7:09   ` Jakub Jelinek
2017-07-26  7:29     ` Richard Biener
2017-07-26 11:41     ` Segher Boessenkool
2017-08-01 16:21       ` Jakub Jelinek [this message]
2017-08-01 23:57         ` Segher Boessenkool
2017-07-25 21:45 ` Matthew Fortune
2017-07-26  7:25   ` Richard Biener
2017-07-26  7:34 ` Eric Botcazou
2017-07-26 10:35 ` Richard Biener
2017-07-26 10:42 ` Uros Bizjak
2017-07-27 11:43 ` Segher Boessenkool
2017-07-27 11:56 ` Andreas Krebbel
2017-08-01  8:09 ` Richard Earnshaw (lists)

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