From: James Greenhalgh <james.greenhalgh@arm.com>
To: Tamar Christina <tamar.christina@arm.com>
Cc: <gcc-patches@gcc.gnu.org>, <nd@arm.com>,
<Richard.Earnshaw@arm.com>, <Marcus.Shawcroft@arm.com>
Subject: Re: [PATCH][GCC][AArch64] Fix pattern guard relaxations that are allowing more constants than they should.
Date: Fri, 11 Aug 2017 14:14:00 -0000 [thread overview]
Message-ID: <20170811130734.GA13888@arm.com> (raw)
In-Reply-To: <20170811110137.GA13171@arm.com>
On Fri, Aug 11, 2017 at 12:01:40PM +0100, Tamar Christina wrote:
> Hi All,
>
>
> Hi previous float immediate patches changed
>
> aarch64_reg_or_fp_zero into aarch64_reg_or_fp_float
> for each of the movdf/sf/hf causing the RTL to contain
> stores to memory it would never be able to find a matching
> pattern for. Reload would then decide to store them to a
> register instead.
>
> This didn't cause any incorrect code or failing tests but did change
> scheduling does producing more inefficient code.
>
> The predicate is not reverted.
>
> Regression tested on aarch64-none-linux-gnu and no regressions.
>
> OK for trunk?
OK.
Thanks,
James
>
> Thanks,
> Tamar
>
>
> gcc/
> 2017-08-11 Tamar Christina <tamar.christina@arm.com>
> * config/aarch64/aarch64.md (mov<mode>): Change.
> (*movhf_aarch64, *movsf_aarch64, *movdf_aarch64):
> aarch64_reg_or_fp_float into aarch64_reg_or_fp_zero.
> * config/aarch64/predicates.md (aarch64_reg_or_fp_float): Removed.
>
> --
prev parent reply other threads:[~2017-08-11 13:07 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-11 13:07 Tamar Christina
2017-08-11 14:14 ` James Greenhalgh [this message]
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