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From: James Greenhalgh <james.greenhalgh@arm.com>
To: <gcc-patches@gcc.gnu.org>, <richard.earnshaw@arm.com>,
	<marcus.shawcroft@arm.com>, <richard.sandiford@linaro.org>
Cc: <nd@arm.com>
Subject: Re: [10/nn] [AArch64] Minor rtx costs tweak
Date: Tue, 31 Oct 2017 18:25:00 -0000	[thread overview]
Message-ID: <20171031180423.GE34758@arm.com> (raw)
In-Reply-To: <87she4afbp.fsf@linaro.org>

On Fri, Oct 27, 2017 at 02:30:18PM +0100, Richard Sandiford wrote:
> aarch64_rtx_costs uses the number of registers in a mode as the basis
> of SET costs.  This patch makes it get the number of registers from
> aarch64_hard_regno_nregs rather than repeating the calcalation inline.
> Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
> the correct SET cost as well.

OK.

Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>

Thanks,
James

> 
> 
> 2017-10-27  Richard Sandiford  <richard.sandiford@linaro.org>
> 	    Alan Hayward  <alan.hayward@arm.com>
> 	    David Sherwood  <david.sherwood@arm.com>
> 
> gcc/
> 	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
> 	aarch64_hard_regno_nregs to get the number of registers
> 	in a mode.
> 

  reply	other threads:[~2017-10-31 18:04 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-27 13:22 [00/nn] AArch64 patches preparing for SVE Richard Sandiford
2017-10-27 13:23 ` [01/nn] [AArch64] Generate permute patterns using rtx builders Richard Sandiford
2017-10-31 18:02   ` James Greenhalgh
2017-11-02  9:03     ` Richard Sandiford
2017-10-27 13:25 ` [02/nn] [AArch64] Move code around Richard Sandiford
2017-10-31 18:03   ` James Greenhalgh
2017-10-27 13:26 ` [03/nn] [AArch64] Rework interface to add constant/offset routines Richard Sandiford
2017-10-30 11:03   ` Richard Sandiford
2017-11-10 15:43     ` James Greenhalgh
2017-10-27 13:27 ` [04/nn] [AArch64] Rename the internal "Upl" constraint Richard Sandiford
2017-10-31 18:04   ` James Greenhalgh
2017-10-27 13:28 ` [06/nn] [AArch64] Add an endian_lane_rtx helper routine Richard Sandiford
2017-11-02  9:55   ` James Greenhalgh
2017-10-27 13:28 ` [05/nn] [AArch64] Rewrite aarch64_simd_valid_immediate Richard Sandiford
2017-11-10 11:20   ` James Greenhalgh
2017-10-27 13:29 ` [08/nn] [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half Richard Sandiford
2017-11-02  9:59   ` James Greenhalgh
2017-10-27 13:29 ` [07/nn] [AArch64] Pass number of units to aarch64_reverse_mask Richard Sandiford
2017-11-02  9:56   ` James Greenhalgh
2017-10-27 13:30 ` [09/nn] [AArch64] Pass number of units to aarch64_expand_vec_perm(_const) Richard Sandiford
2017-11-02 10:00   ` James Greenhalgh
2017-10-27 13:31 ` [10/nn] [AArch64] Minor rtx costs tweak Richard Sandiford
2017-10-31 18:25   ` James Greenhalgh [this message]
2017-10-27 13:31 ` [11/nn] [AArch64] Set NUM_POLY_INT_COEFFS to 2 Richard Sandiford
2018-01-05 11:27   ` PING: " Richard Sandiford
2018-01-06 17:57     ` James Greenhalgh
2018-01-06 19:03       ` Richard Sandiford
2017-10-27 13:37 ` [12/nn] [AArch64] Add const_offset field to aarch64_address_info Richard Sandiford
2017-11-02 10:09   ` James Greenhalgh

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