* [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
@ 2017-11-15 12:35 Tamar Christina
2017-11-15 16:58 ` Sandra Loosemore
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Tamar Christina @ 2017-11-15 12:35 UTC (permalink / raw)
To: gcc-patches; +Cc: nd, james.greenhalgh, Richard.Earnshaw, Marcus.Shawcroft
[-- Attachment #1: Type: text/plain, Size: 492 bytes --]
Hi All,
This patch updates the documentation for AArch64 and ARM correcting the use of the
architecture namings by adding the -A suffix in appropriate places.
Build done on aarch64-none-elf and arm-none-eabi and no issues.
Ok for trunk?
Thanks,
Tamar
gcc/
2017-11-15 Tamar Christina <tamar.christina@arm.com>
* doc/extend.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
* doc/invoke.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
* doc/sourcebuild.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
--
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diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 63b58c0681e856da7ecc8c57c5d2f43613389a1d..a7a1ffcb852749b4e39facb434b2feda3534e77b 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -1045,7 +1045,7 @@ expressions are automatically promoted to @code{float}.
The ARM target provides hardware support for conversions between
@code{__fp16} and @code{float} values
-as an extension to VFP and NEON (Advanced SIMD), and from ARMv8 provides
+as an extension to VFP and NEON (Advanced SIMD), and from ARMv8-A provides
hardware support for conversions between @code{__fp16} and @code{double}
values. GCC generates code using these hardware instructions if you
compile with options to select an FPU that provides them;
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e897d93070ae320f741aeba4d2490f8366843935..b2f044cf5fb75c44a180b2231284882728248952 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -15504,8 +15504,8 @@ entirely disabled by the @samp{+nofp} option that follows it.
Most extension names are generically named, but have an effect that is
dependent upon the architecture to which it is applied. For example,
the @samp{+simd} option can be applied to both @samp{armv7-a} and
-@samp{armv8-a} architectures, but will enable the original ARMv7
-Advanced SIMD (Neon) extensions for @samp{armv7-a} and the ARMv8-a
+@samp{armv8-a} architectures, but will enable the original ARMv7-A
+Advanced SIMD (Neon) extensions for @samp{armv7-a} and the ARMv8-A
variant for @samp{armv8-a}.
The table below lists the supported extensions for each architecture.
@@ -15646,7 +15646,7 @@ Disable the floating-point and Advanced SIMD instructions.
@item +crc
The Cyclic Redundancy Check (CRC) instructions.
@item +simd
-The ARMv8 Advanced SIMD and floating-point instructions.
+The ARMv8-A Advanced SIMD and floating-point instructions.
@item +crypto
The cryptographic instructions.
@item +nocrypto
@@ -15658,7 +15658,7 @@ Disable the floating-point, Advanced SIMD and cryptographic instructions.
@item armv8.1-a
@table @samp
@item +simd
-The ARMv8.1 Advanced SIMD and floating-point instructions.
+The ARMv8.1-A Advanced SIMD and floating-point instructions.
@item +crypto
The cryptographic instructions. This also enables the Advanced SIMD and
@@ -15678,7 +15678,7 @@ The half-precision floating-point data processing instructions.
This also enables the Advanced SIMD and floating-point instructions.
@item +simd
-The ARMv8.1 Advanced SIMD and floating-point instructions.
+The ARMv8.1-A Advanced SIMD and floating-point instructions.
@item +crypto
The cryptographic instructions. This also enables the Advanced SIMD and
@@ -15754,7 +15754,7 @@ The Cyclic Redundancy Check (CRC) instructions.
@item +fp.sp
The single-precision FPv5 floating-point instructions.
@item +simd
-The ARMv8 Advanced SIMD and floating-point instructions.
+The ARMv8-A Advanced SIMD and floating-point instructions.
@item +crypto
The cryptographic instructions.
@item +nocrypto
@@ -16173,9 +16173,9 @@ Divided syntax should be considered deprecated.
@item -mrestrict-it
@opindex mrestrict-it
-Restricts generation of IT blocks to conform to the rules of ARMv8.
+Restricts generation of IT blocks to conform to the rules of ARMv8-A.
IT blocks can only contain a single 16-bit instruction from a select
-set of instructions. This option is on by default for ARMv8 Thumb mode.
+set of instructions. This option is on by default for ARMv8-A Thumb mode.
@item -mprint-tune-info
@opindex mprint-tune-info
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index d5a90e518d67fb289c8caf2e8f2237970b6649ea..9bb14da1a6f6ec76de72a0927a17909c4d2f0ad5 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1714,11 +1714,11 @@ Some multilibs may be incompatible with these options.
@item arm_v8_1a_neon_ok
@anchor{arm_v8_1a_neon_ok}
-ARM target supports options to generate ARMv8.1 Adv.SIMD instructions.
+ARM target supports options to generate ARMv8.1-A Adv.SIMD instructions.
Some multilibs may be incompatible with these options.
@item arm_v8_1a_neon_hw
-ARM target supports executing ARMv8.1 Adv.SIMD instructions. Some
+ARM target supports executing ARMv8.1-A Adv.SIMD instructions. Some
multilibs may be incompatible with the options needed. Implies
arm_v8_1a_neon_ok.
@@ -1727,34 +1727,34 @@ ARM target supports acquire-release instructions.
@item arm_v8_2a_fp16_scalar_ok
@anchor{arm_v8_2a_fp16_scalar_ok}
-ARM target supports options to generate instructions for ARMv8.2 and
+ARM target supports options to generate instructions for ARMv8.2-A and
scalar instructions from the FP16 extension. Some multilibs may be
incompatible with these options.
@item arm_v8_2a_fp16_scalar_hw
-ARM target supports executing instructions for ARMv8.2 and scalar
+ARM target supports executing instructions for ARMv8.2-A and scalar
instructions from the FP16 extension. Some multilibs may be
incompatible with these options. Implies arm_v8_2a_fp16_neon_ok.
@item arm_v8_2a_fp16_neon_ok
@anchor{arm_v8_2a_fp16_neon_ok}
-ARM target supports options to generate instructions from ARMv8.2 with
+ARM target supports options to generate instructions from ARMv8.2-A with
the FP16 extension. Some multilibs may be incompatible with these
options. Implies arm_v8_2a_fp16_scalar_ok.
@item arm_v8_2a_fp16_neon_hw
-ARM target supports executing instructions from ARMv8.2 with the FP16
+ARM target supports executing instructions from ARMv8.2-A with the FP16
extension. Some multilibs may be incompatible with these options.
Implies arm_v8_2a_fp16_neon_ok and arm_v8_2a_fp16_scalar_hw.
@item arm_v8_2a_dotprod_neon_ok
@anchor{arm_v8_2a_dotprod_neon_ok}
-ARM target supports options to generate instructions from ARMv8.2 with
+ARM target supports options to generate instructions from ARMv8.2-A with
the Dot Product extension. Some multilibs may be incompatible with these
options.
@item arm_v8_2a_dotprod_neon_hw
-ARM target supports executing instructions from ARMv8.2 with the Dot
+ARM target supports executing instructions from ARMv8.2-A with the Dot
Product extension. Some multilibs may be incompatible with these options.
Implies arm_v8_2a_dotprod_neon_ok.
@@ -2348,24 +2348,24 @@ arm vfp3 floating point support; see
the @ref{arm_vfp3_ok,,arm_vfp3_ok effective target keyword}.
@item arm_v8_1a_neon
-Add options for ARMv8.1 with Adv.SIMD support, if this is supported
+Add options for ARMv8.1-A with Adv.SIMD support, if this is supported
by the target; see the @ref{arm_v8_1a_neon_ok,,arm_v8_1a_neon_ok}
effective target keyword.
@item arm_v8_2a_fp16_scalar
-Add options for ARMv8.2 with scalar FP16 support, if this is
+Add options for ARMv8.2-A with scalar FP16 support, if this is
supported by the target; see the
@ref{arm_v8_2a_fp16_scalar_ok,,arm_v8_2a_fp16_scalar_ok} effective
target keyword.
@item arm_v8_2a_fp16_neon
-Add options for ARMv8.2 with Adv.SIMD FP16 support, if this is
+Add options for ARMv8.2-A with Adv.SIMD FP16 support, if this is
supported by the target; see the
@ref{arm_v8_2a_fp16_neon_ok,,arm_v8_2a_fp16_neon_ok} effective target
keyword.
@item arm_v8_2a_dotprod_neon
-Add options for ARMv8.2 with Adv.SIMD Dot Product support, if this is
+Add options for ARMv8.2-A with Adv.SIMD Dot Product support, if this is
supported by the target; see the
@ref{arm_v8_2a_dotprod_neon_ok} effective target keyword.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
2017-11-15 12:35 [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions Tamar Christina
@ 2017-11-15 16:58 ` Sandra Loosemore
2017-11-15 17:04 ` Tamar Christina
2017-11-21 17:35 ` Tamar Christina
2017-11-27 15:03 ` James Greenhalgh
2 siblings, 1 reply; 6+ messages in thread
From: Sandra Loosemore @ 2017-11-15 16:58 UTC (permalink / raw)
To: Tamar Christina, gcc-patches
Cc: nd, james.greenhalgh, Richard.Earnshaw, Marcus.Shawcroft
On 11/15/2017 04:51 AM, Tamar Christina wrote:
> Hi All,
>
> This patch updates the documentation for AArch64 and ARM correcting the use of the
> architecture namings by adding the -A suffix in appropriate places.
Just to clarify, was the documentation previously using incorrect
terminology, or are there new non-A ARMv7 and ARMv8 architectures that
invalidate existing uses of those terms without the -A suffix? And, are
the "appropriate places" all currently-unsuffixed uses, or just a subset
of incorrect uses?
The actual patch looks like search-and-replace to me and I have no
objection to it, but I'd like to understand the rationale so that I can
try to remember what the conventions are for future patch review....
-Sandra
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
2017-11-15 16:58 ` Sandra Loosemore
@ 2017-11-15 17:04 ` Tamar Christina
2017-11-15 17:25 ` Sandra Loosemore
0 siblings, 1 reply; 6+ messages in thread
From: Tamar Christina @ 2017-11-15 17:04 UTC (permalink / raw)
To: Sandra Loosemore, gcc-patches
Cc: nd, James Greenhalgh, Richard Earnshaw, Marcus Shawcroft
Hi Sandra,
> -----Original Message-----
> From: Sandra Loosemore [mailto:sandra@codesourcery.com]
> Sent: Wednesday, November 15, 2017 16:38
> To: Tamar Christina <Tamar.Christina@arm.com>; gcc-patches@gcc.gnu.org
> Cc: nd <nd@arm.com>; James Greenhalgh <James.Greenhalgh@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Marcus Shawcroft
> <Marcus.Shawcroft@arm.com>
> Subject: Re: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates
> adding -A extensions.
>
> On 11/15/2017 04:51 AM, Tamar Christina wrote:
> > Hi All,
> >
> > This patch updates the documentation for AArch64 and ARM correcting
> > the use of the architecture namings by adding the -A suffix in appropriate
> places.
>
> Just to clarify, was the documentation previously using incorrect terminology,
> or are there new non-A ARMv7 and ARMv8 architectures that invalidate
> existing uses of those terms without the -A suffix?
Yes, there are the -M and -R suffixes/profiles. A lot of the documentation was written
before these existed. It is mainly a find and replace, but I tried to determine for each
change whether the instructions exist in the other profiles. Hopefully they'll all correct
but I'll leave that for the review.
> And, are the "appropriate
> places" all currently-unsuffixed uses, or just a subset of incorrect uses?
>
It turned out I had to change all of them, for AArch64 for instance we only have A profile.
Which is why all unsuffixes changed to -A. For Aarch32 the explicitly different stuff
Already had the correct suffixes, so I changed the rest to -A as well.
Tamar.
> The actual patch looks like search-and-replace to me and I have no objection
> to it, but I'd like to understand the rationale so that I can try to remember
> what the conventions are for future patch review....
>
> -Sandra
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
2017-11-15 17:04 ` Tamar Christina
@ 2017-11-15 17:25 ` Sandra Loosemore
0 siblings, 0 replies; 6+ messages in thread
From: Sandra Loosemore @ 2017-11-15 17:25 UTC (permalink / raw)
To: Tamar Christina, gcc-patches
Cc: nd, James Greenhalgh, Richard Earnshaw, Marcus Shawcroft
On 11/15/2017 10:00 AM, Tamar Christina wrote:
>> On 11/15/2017 04:51 AM, Tamar Christina wrote:
>>> Hi All,
>>>
>>> This patch updates the documentation for AArch64 and ARM correcting
>>> the use of the architecture namings by adding the -A suffix in appropriate
>> places.
>>
>> Just to clarify, was the documentation previously using incorrect terminology,
>> or are there new non-A ARMv7 and ARMv8 architectures that invalidate
>> existing uses of those terms without the -A suffix?
>
> Yes, there are the -M and -R suffixes/profiles. A lot of the documentation was written
> before these existed. It is mainly a find and replace, but I tried to determine for each
> change whether the instructions exist in the other profiles. Hopefully they'll all correct
> but I'll leave that for the review.
OK. I have no objection to the patch from a documentation point of
view, but I'll defer to the port maintainers for technical review.
-Sandra
^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
2017-11-15 12:35 [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions Tamar Christina
2017-11-15 16:58 ` Sandra Loosemore
@ 2017-11-21 17:35 ` Tamar Christina
2017-11-27 15:03 ` James Greenhalgh
2 siblings, 0 replies; 6+ messages in thread
From: Tamar Christina @ 2017-11-21 17:35 UTC (permalink / raw)
To: Tamar Christina, gcc-patches
Cc: nd, James Greenhalgh, Richard Earnshaw, Marcus Shawcroft
Ping
> -----Original Message-----
> From: gcc-patches-owner@gcc.gnu.org [mailto:gcc-patches-
> owner@gcc.gnu.org] On Behalf Of Tamar Christina
> Sent: Wednesday, November 15, 2017 11:51
> To: gcc-patches@gcc.gnu.org
> Cc: nd <nd@arm.com>; James Greenhalgh <James.Greenhalgh@arm.com>;
> Richard Earnshaw <Richard.Earnshaw@arm.com>; Marcus Shawcroft
> <Marcus.Shawcroft@arm.com>
> Subject: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates
> adding -A extensions.
>
> Hi All,
>
> This patch updates the documentation for AArch64 and ARM correcting the
> use of the architecture namings by adding the -A suffix in appropriate places.
>
> Build done on aarch64-none-elf and arm-none-eabi and no issues.
>
> Ok for trunk?
>
> Thanks,
> Tamar
>
> gcc/
> 2017-11-15 Tamar Christina <tamar.christina@arm.com>
>
> * doc/extend.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
> * doc/invoke.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
> * doc/sourcebuild.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
>
> --
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions.
2017-11-15 12:35 [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions Tamar Christina
2017-11-15 16:58 ` Sandra Loosemore
2017-11-21 17:35 ` Tamar Christina
@ 2017-11-27 15:03 ` James Greenhalgh
2 siblings, 0 replies; 6+ messages in thread
From: James Greenhalgh @ 2017-11-27 15:03 UTC (permalink / raw)
To: Tamar Christina; +Cc: gcc-patches, nd, Richard Earnshaw, Marcus Shawcroft
On Wed, Nov 15, 2017 at 11:51:15AM +0000, Tamar Christina wrote:
> Hi All,
>
> This patch updates the documentation for AArch64 and ARM correcting the use of the
> architecture namings by adding the -A suffix in appropriate places.
>
> Build done on aarch64-none-elf and arm-none-eabi and no issues.
>
> Ok for trunk?
OK.
James
> gcc/
> 2017-11-15 Tamar Christina <tamar.christina@arm.com>
>
> * doc/extend.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
> * doc/invoke.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
> * doc/sourcebuild.texi: Add -A suffix (ARMv8*-A, ARMv7-A).
^ permalink raw reply [flat|nested] 6+ messages in thread
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2017-11-15 12:35 [PATCH][GCC][DOCS][AArch64][ARM] Documentation updates adding -A extensions Tamar Christina
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