From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 68026 invoked by alias); 30 Nov 2017 17:55:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 67973 invoked by uid 89); 30 Nov 2017 17:55:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.1 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,KB_WAM_FROM_NAME_SINGLEWORD,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.2 spammy= X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 30 Nov 2017 17:55:18 +0000 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vAUHtBZX004398 for ; Thu, 30 Nov 2017 12:55:17 -0500 Received: from e34.co.us.ibm.com (e34.co.us.ibm.com [32.97.110.152]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ejnrbb88g-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 30 Nov 2017 12:55:13 -0500 Received: from localhost by e34.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 30 Nov 2017 10:54:54 -0700 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vAUHssLM65601718; Thu, 30 Nov 2017 10:54:54 -0700 Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5773D78038; Thu, 30 Nov 2017 10:54:54 -0700 (MST) Received: from ibm-tiger.the-meissners.org (unknown [9.32.77.111]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP id 28F067803F; Thu, 30 Nov 2017 10:54:54 -0700 (MST) Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id 6CAA647E6A; Thu, 30 Nov 2017 12:54:53 -0500 (EST) Date: Thu, 30 Nov 2017 18:05:00 -0000 From: Michael Meissner To: Segher Boessenkool Cc: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, meissner@gcc.gnu.org Subject: Re: [PATCH] rs6000: Improve fusion assembler output Mail-Followup-To: Michael Meissner , Segher Boessenkool , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, meissner@gcc.gnu.org References: <15d8c743179eaeb9382ea63f183a19a56d4d807b.1512041813.git.segher@kernel.crashing.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <15d8c743179eaeb9382ea63f183a19a56d4d807b.1512041813.git.segher@kernel.crashing.org> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 x-cbid: 17113017-0016-0000-0000-000007E6A04D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008129; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000242; SDB=6.00953480; UDB=6.00481774; IPR=6.00733556; BA=6.00005722; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00018275; XFM=3.00000015; UTC=2017-11-30 17:54:56 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17113017-0017-0000-0000-00003C781E35 Message-Id: <20171130175452.GA13683@ibm-tiger.the-meissners.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-11-30_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1711300234 X-IsSubscribed: yes X-SW-Source: 2017-11/txt/msg02606.txt.bz2 On Thu, Nov 30, 2017 at 11:59:37AM +0000, Segher Boessenkool wrote: > This improves the output for load and store fusion a little. In most > cases it removes the comment output, because that makes the generated > assembler code hard to read, and equivalent info is available with -dp > anyway. For the vector loads it puts the comment on the second insn, > where it doesn't interfere with other debug comments. > > Mike, does this look good? Or is there something I'm missing :-) > > Tested on powerpc64-linux {-m32,-m64}. The comment was used by my perl script (analyze-ppc-asm) that looks at .s files and prints out statistics. I can adjust the tool so it no longer looks for the comment, but actually looks at the adjacent instructions (which I do in a few other cases). > > Segher > > > 2017-11-30 Segher Boessenkool > > * config/rs6000/rs6000-protos.h (emit_fusion_addis): Remove last two > parameters from prototype. > * config/rs6000/rs6000.c (emit_fusion_addis): Remove last two > parameters. Don't print a comment. > (emit_fusion_gpr_load): Adjust. > (emit_fusion_load_store): Adjust. > * config/rs6000/rs6000.md (*fusion_p9__constant): Adjust. > * config/rs6000/vsx.md (two peepholes): Print the "vector load fusion" > comment on the second line. > > gcc/testsuite/ > * gcc.target/powerpc/fusion.c: Add -dp to options. Adjust the expected > output. > * gcc.target/powerpc/fusion3.c: Ditto. > * gcc.target/powerpc/fusion4.c: Ditto. > > --- > gcc/config/rs6000/rs6000-protos.h | 2 +- > gcc/config/rs6000/rs6000.c | 23 +++++------------------ > gcc/config/rs6000/rs6000.md | 2 +- > gcc/config/rs6000/vsx.md | 4 ++-- > gcc/testsuite/gcc.target/powerpc/fusion.c | 4 ++-- > gcc/testsuite/gcc.target/powerpc/fusion3.c | 10 +++++----- > gcc/testsuite/gcc.target/powerpc/fusion4.c | 5 ++--- > 7 files changed, 18 insertions(+), 32 deletions(-) > > diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h > index f3f5f27..9a16a51 100644 > --- a/gcc/config/rs6000/rs6000-protos.h > +++ b/gcc/config/rs6000/rs6000-protos.h > @@ -96,7 +96,7 @@ extern bool quad_address_p (rtx, machine_mode, bool); > extern bool quad_load_store_p (rtx, rtx); > extern bool fusion_gpr_load_p (rtx, rtx, rtx, rtx); > extern void expand_fusion_gpr_load (rtx *); > -extern void emit_fusion_addis (rtx, rtx, const char *, const char *); > +extern void emit_fusion_addis (rtx, rtx); > extern void emit_fusion_load_store (rtx, rtx, rtx, const char *); > extern const char *emit_fusion_gpr_load (rtx, rtx); > extern bool fusion_p9_p (rtx, rtx, rtx, rtx); > diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c > index 2948f2a..9929a45 100644 > --- a/gcc/config/rs6000/rs6000.c > +++ b/gcc/config/rs6000/rs6000.c > @@ -38689,16 +38689,10 @@ expand_fusion_gpr_load (rtx *operands) > sequence. */ > > void > -emit_fusion_addis (rtx target, rtx addis_value, const char *comment, > - const char *mode_name) > +emit_fusion_addis (rtx target, rtx addis_value) > { > rtx fuse_ops[10]; > - char insn_template[80]; > const char *addis_str = NULL; > - const char *comment_str = ASM_COMMENT_START; > - > - if (*comment_str == ' ') > - comment_str++; > > /* Emit the addis instruction. */ > fuse_ops[0] = target; > @@ -38778,9 +38772,7 @@ emit_fusion_addis (rtx target, rtx addis_value, const char *comment, > if (!addis_str) > fatal_insn ("Could not generate addis value for fusion", addis_value); > > - sprintf (insn_template, "%s\t\t%s %s, type %s", addis_str, comment_str, > - comment, mode_name); > - output_asm_insn (insn_template, fuse_ops); > + output_asm_insn (addis_str, fuse_ops); > } > > /* Emit a D-form load or store instruction that is the second instruction > @@ -38913,7 +38905,6 @@ emit_fusion_gpr_load (rtx target, rtx mem) > rtx addr; > rtx load_offset; > const char *load_str = NULL; > - const char *mode_name = NULL; > machine_mode mode; > > if (GET_CODE (mem) == ZERO_EXTEND) > @@ -38929,25 +38920,21 @@ emit_fusion_gpr_load (rtx target, rtx mem) > switch (mode) > { > case E_QImode: > - mode_name = "char"; > load_str = "lbz"; > break; > > case E_HImode: > - mode_name = "short"; > load_str = "lhz"; > break; > > case E_SImode: > case E_SFmode: > - mode_name = (mode == SFmode) ? "float" : "int"; > load_str = "lwz"; > break; > > case E_DImode: > case E_DFmode: > gcc_assert (TARGET_POWERPC64); > - mode_name = (mode == DFmode) ? "double" : "long"; > load_str = "ld"; > break; > > @@ -38956,7 +38943,7 @@ emit_fusion_gpr_load (rtx target, rtx mem) > } > > /* Emit the addis instruction. */ > - emit_fusion_addis (target, addis_value, "gpr load fusion", mode_name); > + emit_fusion_addis (target, addis_value); > > /* Emit the D-form load instruction. */ > emit_fusion_load_store (target, target, load_offset, load_str); > @@ -39225,7 +39212,7 @@ emit_fusion_p9_load (rtx reg, rtx mem, rtx tmp_reg) > fusion_split_address (addr, &hi, &lo); > > /* Emit the addis instruction. */ > - emit_fusion_addis (tmp_reg, hi, "power9 load fusion", GET_MODE_NAME (mode)); > + emit_fusion_addis (tmp_reg, hi); > > /* Emit the D-form load instruction. */ > emit_fusion_load_store (reg, tmp_reg, lo, load_string); > @@ -39312,7 +39299,7 @@ emit_fusion_p9_store (rtx mem, rtx reg, rtx tmp_reg) > fusion_split_address (addr, &hi, &lo); > > /* Emit the addis instruction. */ > - emit_fusion_addis (tmp_reg, hi, "power9 store fusion", GET_MODE_NAME (mode)); > + emit_fusion_addis (tmp_reg, hi); > > /* Emit the D-form load instruction. */ > emit_fusion_load_store (reg, tmp_reg, lo, store_string); > diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md > index 1c15665..7e91d54 100644 > --- a/gcc/config/rs6000/rs6000.md > +++ b/gcc/config/rs6000/rs6000.md > @@ -14120,7 +14120,7 @@ (define_insn "*fusion_p9__constant" > UNSPEC_FUSION_P9))] > "TARGET_P9_FUSION" > { > - emit_fusion_addis (operands[0], operands[1], "constant", ""); > + emit_fusion_addis (operands[0], operands[1]); > return "ori %0,%0,%2"; > } > [(set_attr "type" "two") > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index 00d7656..f6f2bd4 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -4160,7 +4160,7 @@ (define_peephole > (mem:VSX_M (plus:P (match_dup 0) > (match_operand:P 3 "int_reg_operand" ""))))] > "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR" > - "li %0,%1\t\t\t# vector load fusion\;lxx %x2,%0,%3" > + "li %0,%1\;lxx %x2,%0,%3\t\t\t# vector load fusion" > [(set_attr "length" "8") > (set_attr "type" "vecload")]) > > @@ -4171,7 +4171,7 @@ (define_peephole > (mem:VSX_M (plus:P (match_operand:P 3 "int_reg_operand" "") > (match_dup 0))))] > "TARGET_VSX && TARGET_P8_FUSION && !TARGET_P9_VECTOR" > - "li %0,%1\t\t\t# vector load fusion\;lxx %x2,%0,%3" > + "li %0,%1\;lxx %x2,%0,%3\t\t\t# vector load fusion" > [(set_attr "length" "8") > (set_attr "type" "vecload")]) > > diff --git a/gcc/testsuite/gcc.target/powerpc/fusion.c b/gcc/testsuite/gcc.target/powerpc/fusion.c > index 83dbddc..3c75be4 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fusion.c > +++ b/gcc/testsuite/gcc.target/powerpc/fusion.c > @@ -2,7 +2,7 @@ > /* { dg-skip-if "" { powerpc*-*-darwin* } } */ > /* { dg-require-effective-target powerpc_p8vector_ok } */ > /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ > -/* { dg-options "-mcpu=power7 -mtune=power8 -O3" } */ > +/* { dg-options "-mcpu=power7 -mtune=power8 -O3 -dp" } */ > > #define LARGE 0x12345 > > @@ -13,7 +13,7 @@ int fusion_short (short *p){ return p[LARGE]; } > int fusion_int (int *p){ return p[LARGE]; } > unsigned fusion_uns (unsigned *p){ return p[LARGE]; } > > -/* { dg-final { scan-assembler-times "gpr load fusion" 6 } } */ > +/* { dg-final { scan-assembler-times "fusion_gpr_load" 6 } } */ > /* { dg-final { scan-assembler-times "lbz" 2 } } */ > /* { dg-final { scan-assembler-times "extsb" 1 } } */ > /* { dg-final { scan-assembler-times "lhz" 2 } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/fusion3.c b/gcc/testsuite/gcc.target/powerpc/fusion3.c > index bb35ccd..0d9f318 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fusion3.c > +++ b/gcc/testsuite/gcc.target/powerpc/fusion3.c > @@ -2,7 +2,7 @@ > /* { dg-skip-if "" { powerpc*-*-darwin* } } */ > /* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ > -/* { dg-options "-mcpu=power7 -mtune=power9 -O3" } */ > +/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -dp" } */ > > #define LARGE 0x12345 > > @@ -12,7 +12,7 @@ int fusion_double_read (double *p){ return p[LARGE]; } > void fusion_float_write (float *p, float f){ p[LARGE] = f; } > void fusion_double_write (double *p, double d){ p[LARGE] = d; } > > -/* { dg-final { scan-assembler "load fusion, type SF" } } */ > -/* { dg-final { scan-assembler "load fusion, type DF" } } */ > -/* { dg-final { scan-assembler "store fusion, type SF" } } */ > -/* { dg-final { scan-assembler "store fusion, type DF" } } */ > +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_load} } } */ > +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_load} } } */ > +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_sf_store} } } */ > +/* { dg-final { scan-assembler {fusion_vsx_[sd]i_df_store} } } */ > diff --git a/gcc/testsuite/gcc.target/powerpc/fusion4.c b/gcc/testsuite/gcc.target/powerpc/fusion4.c > index 2f3ad12..703c06c 100644 > --- a/gcc/testsuite/gcc.target/powerpc/fusion4.c > +++ b/gcc/testsuite/gcc.target/powerpc/fusion4.c > @@ -1,8 +1,7 @@ > -/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ > /* { dg-skip-if "" { powerpc*-*-darwin* } } */ > /* { dg-require-effective-target powerpc_p9vector_ok } */ > /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ > -/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float" } */ > +/* { dg-options "-mcpu=power7 -mtune=power9 -O3 -msoft-float -dp" } */ > > #define LARGE 0x12345 > > @@ -10,4 +9,4 @@ float fusion_float_read (float *p){ return p[LARGE]; } > > void fusion_float_write (float *p, float f){ p[LARGE] = f; } > > -/* { dg-final { scan-assembler "store fusion, type SF" } } */ > +/* { dg-final { scan-assembler {fusion_gpr_[sd]i_sf_store} } } */ > -- > 1.8.3.1 > -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797