From: Kirill Yukhin <kirill.yukhin@gmail.com>
To: "Shalnov, Sergey" <sergey.shalnov@intel.com>
Cc: "'gcc-patches@gcc.gnu.org'" <gcc-patches@gcc.gnu.org>,
"Koval, Julia" <julia.koval@intel.com>,
"Senkevich, Andrew" <andrew.senkevich@intel.com>,
"Peryt, Sebastian" <sebastian.peryt@intel.com>,
"Ivchenko, Alexander" <alexander.ivchenko@intel.com>,
'Uros Bizjak' <ubizjak@gmail.com>
Subject: Re: [PATCH, i386] Fix registers type for MODE_TI
Date: Fri, 01 Dec 2017 06:00:00 -0000 [thread overview]
Message-ID: <20171201060003.GB22657@titus> (raw)
In-Reply-To: <71475DE127B5E94A8E189586234C088822AE645A@irsmsx105.ger.corp.intel.com>
Hello Sergey,
On 24 Nov 14:52, Shalnov, Sergey wrote:
> Hi,
> I found wrong ymm registers are generated in case of
> "-march=skylake-avx512 -mprefer-vector-width=128" options set
>
> The code looks like:
> movq %r11, 64(%rbx)
> vpxord %ymm0, %ymm0, %ymm0
> vmovdqa64 %xmm0, 32(%rbx)
> movq %r11, 15584(%rbx)
>
> where MODE_TI used in standard_sse_constant_opcode();
>
> This patch fix that to "xmm" registers generation because we don't have to touch
> upper part of registers in case of 128bit type.
>
> 2017-11-24 Sergey Shalnov <Sergey.Shalnov@intel.com>
> gcc/
> * config/i386/i386.c (standard_sse_constant_opcode): Fix
> registers type for 128bit mode.
Good catch. Your patch is OK for trunk. I've checked it in.
--
Thanks, K
prev parent reply other threads:[~2017-12-01 6:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-24 15:35 Shalnov, Sergey
2017-12-01 6:00 ` Kirill Yukhin [this message]
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