* [PATCH][i386,AVX] Enable VNNI support [1/5]
@ 2017-10-24 10:48 Koval, Julia
2017-12-05 7:12 ` Kirill Yukhin
0 siblings, 1 reply; 2+ messages in thread
From: Koval, Julia @ 2017-10-24 10:48 UTC (permalink / raw)
To: GCC Patches; +Cc: Kirill Yukhin
[-- Attachment #1: Type: text/plain, Size: 822 bytes --]
Hi,
This patch enables VNNI isaset option. The doc for isaset and instruction: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VNNI_SET,
OPTION_MASK_ISA_AVX512VNNI_UNSET): New.
(ix86_handle_option): Handle -mavx512vnni.
* config/i386/cpuid.h (bit_AVX512VNNI): New bit.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle new bit.
* config/i386/i386-c (__AVX512VNNI__): New.
* config/i386/i386.c (ix86_target_string): Handle new option.
(ix86_valid_target_attribute_inner_p): Handle new option.
* config/i386/i386.h (TARGET_AVX512VNNI, TARGET_AVX512VNNI_P): New.
* config/i386/i386.opt (mavx512vnni): New option.
[-- Attachment #2: 0010-VNNI-option.patch --]
[-- Type: application/octet-stream, Size: 7602 bytes --]
From d415cdaed37dbfdab005e2b0de76468766d504d9 Mon Sep 17 00:00:00 2001
From: "julia.koval" <jkoval@gkliclel201.igk.intel.com>
Date: Thu, 19 Oct 2017 10:49:19 +0200
Subject: [PATCH 10/14] VNNI option
---
gcc/common/config/i386/i386-common.c | 17 +++++++++++++++++
gcc/config/i386/cpuid.h | 1 +
gcc/config/i386/driver-i386.c | 5 ++++-
gcc/config/i386/i386-c.c | 2 ++
gcc/config/i386/i386.c | 2 ++
gcc/config/i386/i386.h | 2 ++
gcc/config/i386/i386.opt | 4 ++++
7 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c
index 9b81eef..63c26cf 100644
--- a/gcc/common/config/i386/i386-common.c
+++ b/gcc/common/config/i386/i386-common.c
@@ -81,6 +81,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS
#define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW
#define OPTION_MASK_ISA_AVX512VBMI2_SET OPTION_MASK_ISA_AVX512VBMI2
+#define OPTION_MASK_ISA_AVX512VNNI_SET OPTION_MASK_ISA_AVX512VNNI
#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ
#define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM
#define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW
@@ -193,6 +194,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS
#define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW
#define OPTION_MASK_ISA_AVX512VBMI2_UNSET OPTION_MASK_ISA_AVX512VBMI2
+#define OPTION_MASK_ISA_AVX512VNNI_UNSET OPTION_MASK_ISA_AVX512VNNI
#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ
#define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM
#define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW
@@ -579,6 +581,21 @@ ix86_handle_option (struct gcc_options *opts,
}
return true;
+ case OPT_mavx512vnni:
+ if (value)
+ {
+ opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VNNI_SET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_SET;
+ opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512F_SET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512F_SET;
+ }
+ else
+ {
+ opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VNNI_UNSET;
+ opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VNNI_UNSET;
+ }
+ return true;
+
case OPT_mavx512vpopcntdq:
if (value)
{
diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h
index 4fad5d2..3c992a8 100644
--- a/gcc/config/i386/cpuid.h
+++ b/gcc/config/i386/cpuid.h
@@ -100,6 +100,7 @@
#define bit_AVX512VBMI2 (1 << 6)
#define bit_SHSTK (1 << 7)
#define bit_GFNI (1 << 8)
+#define bit_AVX512VNNI (1 << 11)
#define bit_AVX512VPOPCNTDQ (1 << 14)
#define bit_RDPID (1 << 22)
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 8482eeb..78e674e 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -417,6 +417,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
unsigned int has_ibt = 0, has_shstk = 0;
+ unsigned int has_avx512vnni = 0;
bool arch;
@@ -506,6 +507,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_avx512vbmi = ecx & bit_AVX512VBMI;
has_pku = ecx & bit_OSPKE;
has_avx512vbmi2 = ecx & bit_AVX512VBMI2;
+ has_avx512vnni = ecx & bit_AVX512VNNI;
has_rdpid = ecx & bit_RDPID;
has_gfni = ecx & bit_GFNI;
@@ -1050,6 +1052,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *avx512vbmi = has_avx512vbmi ? " -mavx512vbmi" : " -mno-avx512vbmi";
const char *avx5124vnniw = has_avx5124vnniw ? " -mavx5124vnniw" : " -mno-avx5124vnniw";
const char *avx512vbmi2 = has_avx512vbmi2 ? " -mavx512vbmi2" : " -mno-avx512vbmi2";
+ const char *avx512vnni = has_avx512vnni ? " -mavx512vnni" : " -mno-avx512vnni";
const char *avx5124fmaps = has_avx5124fmaps ? " -mavx5124fmaps" : " -mno-avx5124fmaps";
const char *clwb = has_clwb ? " -mclwb" : " -mno-clwb";
const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx";
@@ -1069,7 +1072,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
xsavec, xsaves, avx512dq, avx512bw, avx512vl,
avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk,
- avx512vbmi2, NULL);
+ avx512vbmi2, avx512vnni, NULL);
}
done:
diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c
index 0cbae8f..fff8681 100644
--- a/gcc/config/i386/i386-c.c
+++ b/gcc/config/i386/i386-c.c
@@ -387,6 +387,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__AVX5124VNNIW__");
if (isa_flag2 & OPTION_MASK_ISA_AVX512VBMI2)
def_or_undef (parse_in, "__AVX512VBMI2__");
+ if (isa_flag2 & OPTION_MASK_ISA_AVX512VNNI)
+ def_or_undef (parse_in, "__AVX512VNNI__");
if (isa_flag2 & OPTION_MASK_ISA_SGX)
def_or_undef (parse_in, "__SGX__");
if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index fec052d..8c05d1c 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2742,6 +2742,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
{
{ "-mgfni", OPTION_MASK_ISA_GFNI },
{ "-mavx512vbmi2", OPTION_MASK_ISA_AVX512VBMI2 },
+ { "-mavx512vnni", OPTION_MASK_ISA_AVX512VNNI },
{ "-mrdpid", OPTION_MASK_ISA_RDPID },
{ "-msgx", OPTION_MASK_ISA_SGX },
{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
@@ -5241,6 +5242,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw),
IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq),
IX86_ATTR_ISA ("avx512vbmi2", OPT_mavx512vbmi2),
+ IX86_ATTR_ISA ("avx512vnni", OPT_mavx512vnni),
IX86_ATTR_ISA ("avx512vbmi", OPT_mavx512vbmi),
IX86_ATTR_ISA ("avx512ifma", OPT_mavx512ifma),
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 9e99328..8ebeb1f 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -89,6 +89,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
#define TARGET_AVX512VBMI2_P(x) TARGET_ISA_AVX512VBMI2_P(x)
#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ
#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x)
+#define TARGET_AVX512VNNI TARGET_ISA_AVX512VNNI
+#define TARGET_AVX512VNNI_P(x) TARGET_ISA_AVX512VNNI_P(x)
#define TARGET_FMA TARGET_ISA_FMA
#define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x)
#define TARGET_SSE4A TARGET_ISA_SSE4A
diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 090b898..e856a03 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -721,6 +721,10 @@ mavx512vbmi2
Target Report Mask(ISA_AVX512VBMI2) Var(ix86_isa_flags2) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VBMI2 built-in functions and code generation.
+mavx512vnni
+Target Report Mask(ISA_AVX512VNNI) Var(ix86_isa_flags2) Save
+Support AVX512VNNI built-in functions and code generation.
+
mfma
Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation.
--
2.5.5
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH][i386,AVX] Enable VNNI support [1/5]
2017-10-24 10:48 [PATCH][i386,AVX] Enable VNNI support [1/5] Koval, Julia
@ 2017-12-05 7:12 ` Kirill Yukhin
0 siblings, 0 replies; 2+ messages in thread
From: Kirill Yukhin @ 2017-12-05 7:12 UTC (permalink / raw)
To: Koval, Julia; +Cc: GCC Patches
Hello Julia,
On 24 Oct 10:37, Koval, Julia wrote:
> Hi,
> This patch enables VNNI isaset option. The doc for isaset and instruction: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>
> Ok for trunk?
Your patch is OK for trunk. I've checked it in.
--
Thanks, K
>
> Thanks,
> Julia
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