patch to fix PR80818

patch to fix PR80818

[Vladimir Makarov]

[-- Attachment #1: Type: text/plain, Size: 339 bytes --]

   The following patch fixes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818

   The patch was successfully tested and bootstrapped on x86_64. The 
patch has no test because it is hard to check the problem.  I checked 
manually that the patch solves the problem on a test provided by Andreas 
Krebbel.

    Committed as rev. 255258.



[-- Attachment #2: pr80818.patch --]
[-- Type: text/x-patch, Size: 8982 bytes --]

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 255255)
+++ ChangeLog	(working copy)
@@ -1,3 +1,15 @@
+2017-11-29  Vladimir Makarov  <vmakarov@redhat.com>
+
+	PR rtl-optimization/80818
+	* lra.c (collect_non_operand_hard_regs): New arg insn.  Pass it
+	recursively.  Use insn code for clobber.
+	(lra_set_insn_recog_data): Pass the new arg to
+	collect_non_operand_hard_regs.
+	(add_regs_to_insn_regno_info): Pass insn instead of uid.  Use insn
+	code for clobber.
+	(lra_update_insn_regno_info): Pass insn to
+	add_regs_to_insn_regno_info.
+
 2017-11-29  Julia Koval  <julia.koval@intel.com>
 
 	* config/i386/avx512vbmi2intrin.h (_mm512_shldv_epi16,
Index: lra.c
===================================================================
--- lra.c	(revision 255256)
+++ lra.c	(working copy)
@@ -807,7 +807,8 @@ setup_operand_alternative (lra_insn_reco
    to LIST.  X is a part of insn given by DATA.	 Return the result
    list.  */
 static struct lra_insn_reg *
-collect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data,
+collect_non_operand_hard_regs (rtx_insn *insn, rtx *x,
+			       lra_insn_recog_data_t data,
 			       struct lra_insn_reg *list,
 			       enum op_type type, bool early_clobber)
 {
@@ -881,25 +882,28 @@ collect_non_operand_hard_regs (rtx *x, l
   switch (code)
     {
     case SET:
-      list = collect_non_operand_hard_regs (&SET_DEST (op), data,
+      list = collect_non_operand_hard_regs (insn, &SET_DEST (op), data,
 					    list, OP_OUT, false);
-      list = collect_non_operand_hard_regs (&SET_SRC (op), data,
+      list = collect_non_operand_hard_regs (insn, &SET_SRC (op), data,
 					    list, OP_IN, false);
       break;
     case CLOBBER:
-      /* We treat clobber of non-operand hard registers as early
-	 clobber (the behavior is expected from asm).  */
-      list = collect_non_operand_hard_regs (&XEXP (op, 0), data,
-					    list, OP_OUT, true);
-      break;
+      {
+	int code = INSN_CODE (insn);
+	/* We treat clobber of non-operand hard registers as early
+	   clobber (the behavior is expected from asm).  */
+	list = collect_non_operand_hard_regs (insn, &XEXP (op, 0), data,
+					      list, OP_OUT, code < 0);
+	break;
+      }
     case PRE_INC: case PRE_DEC: case POST_INC: case POST_DEC:
-      list = collect_non_operand_hard_regs (&XEXP (op, 0), data,
+      list = collect_non_operand_hard_regs (insn, &XEXP (op, 0), data,
 					    list, OP_INOUT, false);
       break;
     case PRE_MODIFY: case POST_MODIFY:
-      list = collect_non_operand_hard_regs (&XEXP (op, 0), data,
+      list = collect_non_operand_hard_regs (insn, &XEXP (op, 0), data,
 					    list, OP_INOUT, false);
-      list = collect_non_operand_hard_regs (&XEXP (op, 1), data,
+      list = collect_non_operand_hard_regs (insn, &XEXP (op, 1), data,
 					    list, OP_IN, false);
       break;
     default:
@@ -907,12 +911,12 @@ collect_non_operand_hard_regs (rtx *x, l
       for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
 	{
 	  if (fmt[i] == 'e')
-	    list = collect_non_operand_hard_regs (&XEXP (op, i), data,
+	    list = collect_non_operand_hard_regs (insn, &XEXP (op, i), data,
 						  list, OP_IN, false);
 	  else if (fmt[i] == 'E')
 	    for (j = XVECLEN (op, i) - 1; j >= 0; j--)
-	      list = collect_non_operand_hard_regs (&XVECEXP (op, i, j), data,
-						    list, OP_IN, false);
+	      list = collect_non_operand_hard_regs (insn, &XVECEXP (op, i, j),
+						    data, list, OP_IN, false);
 	}
     }
   return list;
@@ -1055,7 +1059,7 @@ lra_set_insn_recog_data (rtx_insn *insn)
     insn_static_data->hard_regs = NULL;
   else
     insn_static_data->hard_regs
-      = collect_non_operand_hard_regs (&PATTERN (insn), data,
+      = collect_non_operand_hard_regs (insn, &PATTERN (insn), data,
 				       NULL, OP_IN, false);
   data->arg_hard_regs = NULL;
   if (CALL_P (insn))
@@ -1402,13 +1406,14 @@ lra_get_copy (int n)
 /* This page contains code dealing with info about registers in
    insns.  */
 
-/* Process X of insn UID recursively and add info (operand type is
+/* Process X of INSN recursively and add info (operand type is
    given by TYPE, flag of that it is early clobber is EARLY_CLOBBER)
    about registers in X to the insn DATA.  If X can be early clobbered,
    alternatives in which it can be early clobbered are given by
    EARLY_CLOBBER_ALTS.  */
 static void
-add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid,
+add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x,
+			     rtx_insn *insn,
 			     enum op_type type, bool early_clobber,
 			     alternative_mask early_clobber_alts)
 {
@@ -1436,7 +1441,7 @@ add_regs_to_insn_regno_info (lra_insn_re
       /* Process all regs even unallocatable ones as we need info about
 	 all regs for rematerialization pass.  */
       expand_reg_info ();
-      if (bitmap_set_bit (&lra_reg_info[regno].insn_bitmap, uid))
+      if (bitmap_set_bit (&lra_reg_info[regno].insn_bitmap, INSN_UID (insn)))
 	{
 	  data->regs = new_insn_reg (data->insn, regno, type, mode, subreg_p,
 				     early_clobber, early_clobber_alts,
@@ -1471,20 +1476,25 @@ add_regs_to_insn_regno_info (lra_insn_re
   switch (code)
     {
     case SET:
-      add_regs_to_insn_regno_info (data, SET_DEST (x), uid, OP_OUT, false, 0);
-      add_regs_to_insn_regno_info (data, SET_SRC (x), uid, OP_IN, false, 0);
+      add_regs_to_insn_regno_info (data, SET_DEST (x), insn, OP_OUT, false, 0);
+      add_regs_to_insn_regno_info (data, SET_SRC (x), insn, OP_IN, false, 0);
       break;
     case CLOBBER:
-      /* We treat clobber of non-operand hard registers as early
-	 clobber (the behavior is expected from asm).  */
-      add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_OUT, true, ALL_ALTERNATIVES);
-      break;
+      {
+	int code = INSN_CODE (insn);
+
+	/* We treat clobber of non-operand hard registers as early
+	   clobber (the behavior is expected from asm).  */
+	add_regs_to_insn_regno_info (data, XEXP (x, 0), insn, OP_OUT,
+				     code < 0, code < 0 ? ALL_ALTERNATIVES : 0);
+	break;
+      }
     case PRE_INC: case PRE_DEC: case POST_INC: case POST_DEC:
-      add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false, 0);
+      add_regs_to_insn_regno_info (data, XEXP (x, 0), insn, OP_INOUT, false, 0);
       break;
     case PRE_MODIFY: case POST_MODIFY:
-      add_regs_to_insn_regno_info (data, XEXP (x, 0), uid, OP_INOUT, false, 0);
-      add_regs_to_insn_regno_info (data, XEXP (x, 1), uid, OP_IN, false, 0);
+      add_regs_to_insn_regno_info (data, XEXP (x, 0), insn, OP_INOUT, false, 0);
+      add_regs_to_insn_regno_info (data, XEXP (x, 1), insn, OP_IN, false, 0);
       break;
     default:
       if ((code != PARALLEL && code != EXPR_LIST) || type != OP_OUT)
@@ -1505,11 +1515,11 @@ add_regs_to_insn_regno_info (lra_insn_re
       for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
 	{
 	  if (fmt[i] == 'e')
-	    add_regs_to_insn_regno_info (data, XEXP (x, i), uid, type, false, 0);
+	    add_regs_to_insn_regno_info (data, XEXP (x, i), insn, type, false, 0);
 	  else if (fmt[i] == 'E')
 	    {
 	      for (j = XVECLEN (x, i) - 1; j >= 0; j--)
-		add_regs_to_insn_regno_info (data, XVECEXP (x, i, j), uid,
+		add_regs_to_insn_regno_info (data, XVECEXP (x, i, j), insn,
 					     type, false, 0);
 	    }
 	}
@@ -1585,7 +1595,7 @@ setup_insn_reg_info (lra_insn_recog_data
 void
 lra_update_insn_regno_info (rtx_insn *insn)
 {
-  int i, uid, freq;
+  int i, freq;
   lra_insn_recog_data_t data;
   struct lra_static_insn_data *static_data;
   enum rtx_code code;
@@ -1597,14 +1607,13 @@ lra_update_insn_regno_info (rtx_insn *in
   static_data = data->insn_static_data;
   freq = get_insn_freq (insn);
   invalidate_insn_data_regno_info (data, insn, freq);
-  uid = INSN_UID (insn);
   for (i = static_data->n_operands - 1; i >= 0; i--)
-    add_regs_to_insn_regno_info (data, *data->operand_loc[i], uid,
+    add_regs_to_insn_regno_info (data, *data->operand_loc[i], insn,
 				 static_data->operand[i].type,
 				 static_data->operand[i].early_clobber,
 				 static_data->operand[i].early_clobber_alts);
   if ((code = GET_CODE (PATTERN (insn))) == CLOBBER || code == USE)
-    add_regs_to_insn_regno_info (data, XEXP (PATTERN (insn), 0), uid,
+    add_regs_to_insn_regno_info (data, XEXP (PATTERN (insn), 0), insn,
 				 code == USE ? OP_IN : OP_OUT, false, 0);
   if (CALL_P (insn))
     /* On some targets call insns can refer to pseudos in memory in
@@ -1616,7 +1625,7 @@ lra_update_insn_regno_info (rtx_insn *in
 	 link = XEXP (link, 1))
       if (((code = GET_CODE (XEXP (link, 0))) == USE || code == CLOBBER)
 	  && MEM_P (XEXP (XEXP (link, 0), 0)))
-	add_regs_to_insn_regno_info (data, XEXP (XEXP (link, 0), 0), uid,
+	add_regs_to_insn_regno_info (data, XEXP (XEXP (link, 0), 0), insn,
 				     code == USE ? OP_IN : OP_OUT, false, 0);
   if (NONDEBUG_INSN_P (insn))
     setup_insn_reg_info (data, freq);

Re: patch to fix PR80818

[Andreas Schwab]

On Nov 29 2017, Vladimir Makarov <vmakarov@redhat.com> wrote:

> +2017-11-29  Vladimir Makarov  <vmakarov@redhat.com>
> +
> +	PR rtl-optimization/80818
> +	* lra.c (collect_non_operand_hard_regs): New arg insn.  Pass it
> +	recursively.  Use insn code for clobber.
> +	(lra_set_insn_recog_data): Pass the new arg to
> +	collect_non_operand_hard_regs.
> +	(add_regs_to_insn_regno_info): Pass insn instead of uid.  Use insn
> +	code for clobber.
> +	(lra_update_insn_regno_info): Pass insn to
> +	add_regs_to_insn_regno_info.
> +

This causes many regressions on powerpc, for example:

FAIL: gcc.c-torture/compile/pr70240.c   -Os  (test for excess errors)
Excess errors:
/tmp/cc9usHrI.s:101: Error: address register in load range
/tmp/cc9usHrI.s:143: Error: address register in load range
/tmp/cc9usHrI.s:182: Error: address register in load range
/tmp/cc9usHrI.s:278: Error: address register in load range
/tmp/cc9usHrI.s:296: Error: address register in load range
/tmp/cc9usHrI.s:307: Error: address register in load range
/tmp/cc9usHrI.s:316: Error: address register in load range

Andreas.

-- 
Andreas Schwab, schwab@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

[PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Jakub Jelinek]

On Wed, Nov 29, 2017 at 05:21:22PM -0500, Vladimir Makarov wrote:
>   The following patch fixes
> 
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818
> 
>   The patch was successfully tested and bootstrapped on x86_64. The patch
> has no test because it is hard to check the problem.  I checked manually

This changed fixed PR83252 which has a reasonably small testcase.
I've further reduced it using creduce (with -O0 -W{,maybe-}uninitialized
and/or -fsanitize=undefined checking, plus test that it succeeds with
r255258 and fails with r255257).  Can you please double check if the
testcase represents the same issue you were working on or if your change
merely made the bug latent again?

2017-12-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/83252
	* gcc.target/i386/i386.exp (check_effective_target_bmi2): Moved to ...
	* lib/target-supports.exp (check_effective_target_bmi2): ... here.  Guard with
	i?86-*-* x86_64-*-*.
	* g++.dg/opt/pr83252.C: New test.

--- gcc/testsuite/gcc.target/i386/i386.exp.jj	2017-11-24 08:58:04.000000000 +0100
+++ gcc/testsuite/gcc.target/i386/i386.exp	2017-12-04 11:42:49.215754513 +0100
@@ -207,17 +207,6 @@ proc check_effective_target_bmi { } {
     } "-mbmi" ]
 }
 
-# Return 1 if bmi2 instructions can be compiled.
-proc check_effective_target_bmi2 { } {
-    return [check_no_compiler_messages bmi2 object {
-	unsigned int
-	_bzhi_u32 (unsigned int __X, unsigned int __Y)
-	{
-	    return __builtin_ia32_bzhi_si (__X, __Y);
-	}
-    } "-mbmi2" ]
-}
-
 # Return 1 if ADX instructions can be compiled.
 proc check_effective_target_adx { } {
     return [check_no_compiler_messages adx object {
--- gcc/testsuite/lib/target-supports.exp.jj	2017-11-28 12:11:35.000000000 +0100
+++ gcc/testsuite/lib/target-supports.exp	2017-12-04 11:34:55.080598710 +0100
@@ -1852,6 +1852,20 @@ proc check_effective_target_avx512f_runt
     return 0
 }
 
+# Return 1 if bmi2 instructions can be compiled.
+proc check_effective_target_bmi2 { } {
+    if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
+        return 0
+    }
+    return [check_no_compiler_messages bmi2 object {
+	unsigned int
+	_bzhi_u32 (unsigned int __X, unsigned int __Y)
+	{
+	    return __builtin_ia32_bzhi_si (__X, __Y);
+	}
+    } "-mbmi2" ]
+}
+
 # Return 1 if the target supports executing MIPS Paired-Single instructions,
 # 0 otherwise.  Cache the result.
 
--- gcc/testsuite/g++.dg/opt/pr83252.C.jj	2017-12-04 11:31:29.945191880 +0100
+++ gcc/testsuite/g++.dg/opt/pr83252.C	2017-12-04 11:41:33.041686570 +0100
@@ -0,0 +1,92 @@
+// PR target/83252
+// { dg-do run }
+// { dg-options "-O3" }
+// { dg-additional-options "-mbmi2 -mtune=intel" { target bmi2 } }
+
+#if __SIZEOF_INT__ == 4 && __SIZEOF_LONG_LONG__ == 8 && __CHAR_BIT__ == 8
+
+#ifdef __BMI2__
+#include "../../gcc.target/i386/bmi2-check.h"
+#endif
+
+long long h = 707493562598231894LL, i, n, x3, x5;
+long long j, l = -2228108721620697360LL, o, y9;
+int k, p, r, s, t = 2, u, w, z8, x7, y4, y5, y6, y7, y8, x1, x2, x4, x6, d;
+unsigned v, x = 751359462, z = 1, y3 = 60;
+unsigned *y = &x, *z2 = &z, *z3 = &v;
+unsigned long long z1 = 2;
+unsigned long long *z4 = &z1;
+long long *z7;
+unsigned long long z9 = 7091529791657LL;
+
+void
+foo ()
+{
+  if ((-2783342978U * (int) l || z) && z2 && h && z1 && z9 & ~-(-2783342978U * (int) l))
+    {
+      i = 3060393125LL < n;
+      y7 = o >> *y - 751359400;
+      *z3 = x7;
+      long a = (o >> *y - 751359400 >> ~-(-2783342978U * (int) l) - 88480234) - (-2783342978U * (int) l);
+      y6 = a;
+      if (~0 % *z4 % 5)
+	y8 = -3 * (l - 4 ? : 407228174574);
+      if (y3 < 1)
+	{
+	  long long *b = &y9;
+	  z3 = 0;
+	  int c = *z2;
+	  *z7 = 0;
+	  x1 = ~(-((unsigned) (-2783342978U * (unsigned long long) l)));
+	  p = *b & j;
+	  x2 = c;
+	}
+      else
+	{
+	  j = 0;
+	  int e = !0 % (7 % *z4);
+	  r = ((s || !k) && t) - -(-2783342978U * (unsigned long long) l);
+	  x3 = o >> *y - 751359400;
+	  y9 = z9;
+	  long f = o >> *y - 751359400 >> ~-(-2783342978U * (int) l) - 88480234;
+	  x4 = z1;
+	  u = n * f * e * y4;
+	}
+      if (8ULL * -(-(-2783342978U * (int) l)))
+	;
+      else
+	{
+	  *z3 = 0;
+	  int g = 3 & y5;
+	  x5 = (unsigned) (~o + 9223372036854775807 >> l);
+	  z8 = g + y9;
+	  v = j || ~0 + 9223372036854775807 >> ~-(-2783342978U * (int) l);
+	  x6 = o >> (8 * l);
+	  w = *y ? -2783342978U * l : 0;
+	}
+    }
+}
+
+#ifdef __BMI2__
+void
+bmi2_test (void)
+{
+  foo ();
+  if (r != 88480289)
+    __builtin_abort ();
+}
+#else
+int
+main ()
+{
+  foo ();
+  if (r != 88480289)
+    __builtin_abort ();
+}
+#endif
+#else
+int
+main ()
+{
+}
+#endif


	Jakub

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Jakub Jelinek]

On Mon, Dec 04, 2017 at 11:52:01AM +0100, Jakub Jelinek wrote:
> On Wed, Nov 29, 2017 at 05:21:22PM -0500, Vladimir Makarov wrote:
> >   The following patch fixes
> > 
> > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818
> > 
> >   The patch was successfully tested and bootstrapped on x86_64. The patch
> > has no test because it is hard to check the problem.  I checked manually
> 
> This changed fixed PR83252 which has a reasonably small testcase.
> I've further reduced it using creduce (with -O0 -W{,maybe-}uninitialized
> and/or -fsanitize=undefined checking, plus test that it succeeds with
> r255258 and fails with r255257).  Can you please double check if the
> testcase represents the same issue you were working on or if your change
> merely made the bug latent again?

Unfortunately, it broke again with r255377.  Vladimir, could you please have
a look at this PR?

	Jakub

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Vladimir Makarov]

On 12/05/2017 07:49 AM, Jakub Jelinek wrote:
> On Mon, Dec 04, 2017 at 11:52:01AM +0100, Jakub Jelinek wrote:
>> On Wed, Nov 29, 2017 at 05:21:22PM -0500, Vladimir Makarov wrote:
>>>    The following patch fixes
>>>
>>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818
>>>
>>>    The patch was successfully tested and bootstrapped on x86_64. The patch
>>> has no test because it is hard to check the problem.  I checked manually
>> This changed fixed PR83252 which has a reasonably small testcase.
>> I've further reduced it using creduce (with -O0 -W{,maybe-}uninitialized
>> and/or -fsanitize=undefined checking, plus test that it succeeds with
>> r255258 and fails with r255257).  Can you please double check if the
>> testcase represents the same issue you were working on or if your change
>> merely made the bug latent again?
> Unfortunately, it broke again with r255377.  Vladimir, could you please have
> a look at this PR?
>
Yes, I'll work on it.

The more I look at the problem discussed in PR80818, PR83252, and 
PR83245, the more I think it is actually a LRA rematerialziation problem.

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Rainer Orth]

Hi Jakub,

> On Wed, Nov 29, 2017 at 05:21:22PM -0500, Vladimir Makarov wrote:
>>   The following patch fixes
>> 
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818
>> 
>>   The patch was successfully tested and bootstrapped on x86_64. The patch
>> has no test because it is hard to check the problem.  I checked manually
>
> This changed fixed PR83252 which has a reasonably small testcase.
> I've further reduced it using creduce (with -O0 -W{,maybe-}uninitialized
> and/or -fsanitize=undefined checking, plus test that it succeeds with
> r255258 and fails with r255257).  Can you please double check if the
> testcase represents the same issue you were working on or if your change
> merely made the bug latent again?
>
> 2017-12-04  Jakub Jelinek  <jakub@redhat.com>
>
> 	PR target/83252
> 	* gcc.target/i386/i386.exp (check_effective_target_bmi2): Moved to ...
> 	* lib/target-supports.exp (check_effective_target_bmi2): ... here.  Guard with
> 	i?86-*-* x86_64-*-*.
> 	* g++.dg/opt/pr83252.C: New test.

the new testcase FAILs on Solaris/x86 with /bin/as:

+FAIL: g++.dg/opt/pr83252.C  -std=gnu++11 execution test
+FAIL: g++.dg/opt/pr83252.C  -std=gnu++14 execution test
+FAIL: g++.dg/opt/pr83252.C  -std=gnu++98 execution test

ld.so.1: pr83252.exe: fatal: pr83252.exe: hardware capability (CA_SUNW_HW_2) unsupported: 0x80  [ BMI2 ]

Inside gcc.target/i386, clearcap.exp takes care of that.

	Rainer

-- 
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Jakub Jelinek]

On Fri, Dec 08, 2017 at 01:38:36PM +0100, Rainer Orth wrote:
> Hi Jakub,
> 
> > On Wed, Nov 29, 2017 at 05:21:22PM -0500, Vladimir Makarov wrote:
> >>   The following patch fixes
> >> 
> >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80818
> >> 
> >>   The patch was successfully tested and bootstrapped on x86_64. The patch
> >> has no test because it is hard to check the problem.  I checked manually
> >
> > This changed fixed PR83252 which has a reasonably small testcase.
> > I've further reduced it using creduce (with -O0 -W{,maybe-}uninitialized
> > and/or -fsanitize=undefined checking, plus test that it succeeds with
> > r255258 and fails with r255257).  Can you please double check if the
> > testcase represents the same issue you were working on or if your change
> > merely made the bug latent again?
> >
> > 2017-12-04  Jakub Jelinek  <jakub@redhat.com>
> >
> > 	PR target/83252
> > 	* gcc.target/i386/i386.exp (check_effective_target_bmi2): Moved to ...
> > 	* lib/target-supports.exp (check_effective_target_bmi2): ... here.  Guard with
> > 	i?86-*-* x86_64-*-*.
> > 	* g++.dg/opt/pr83252.C: New test.
> 
> the new testcase FAILs on Solaris/x86 with /bin/as:
> 
> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++11 execution test
> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++14 execution test
> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++98 execution test
> 
> ld.so.1: pr83252.exe: fatal: pr83252.exe: hardware capability (CA_SUNW_HW_2) unsupported: 0x80  [ BMI2 ]
> 
> Inside gcc.target/i386, clearcap.exp takes care of that.

This can't be in gcc.target/i386/, because the test has to be C++ (doesn't
fail in C).

So dg-skip-if on Solaris, or { target { bmi2 && { ! *-*-solaris* } } } for
the -mbmi2 option?

	Jakub

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Rainer Orth]

Hi Jakub,

>> the new testcase FAILs on Solaris/x86 with /bin/as:
>> 
>> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++11 execution test
>> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++14 execution test
>> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++98 execution test
>> 
>> ld.so.1: pr83252.exe: fatal: pr83252.exe: hardware capability
>> (CA_SUNW_HW_2) unsupported: 0x80 [ BMI2 ]
>> 
>> Inside gcc.target/i386, clearcap.exp takes care of that.
>
> This can't be in gcc.target/i386/, because the test has to be C++ (doesn't
> fail in C).

I see; hadn't checked...

> So dg-skip-if on Solaris, or { target { bmi2 && { ! *-*-solaris* } } } for
> the -mbmi2 option?

... or { dg-additional-options "-mclear-hwcap" { *-*-solaris* } }

	Rainer

-- 
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Jakub Jelinek]

On Fri, Dec 08, 2017 at 01:47:35PM +0100, Rainer Orth wrote:
> >> the new testcase FAILs on Solaris/x86 with /bin/as:
> >> 
> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++11 execution test
> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++14 execution test
> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++98 execution test
> >> 
> >> ld.so.1: pr83252.exe: fatal: pr83252.exe: hardware capability
> >> (CA_SUNW_HW_2) unsupported: 0x80 [ BMI2 ]
> >> 
> >> Inside gcc.target/i386, clearcap.exp takes care of that.
> >
> > This can't be in gcc.target/i386/, because the test has to be C++ (doesn't
> > fail in C).
> 
> I see; hadn't checked...
> 
> > So dg-skip-if on Solaris, or { target { bmi2 && { ! *-*-solaris* } } } for
> > the -mbmi2 option?
> 
> ... or { dg-additional-options "-mclear-hwcap" { *-*-solaris* } }

If it works, sure.  I can't test it though.

	Jakub

Re: [PATCH] Add testcase for PR83252 (was Re: patch to fix PR80818)

[Rainer Orth]

[-- Attachment #1: Type: text/plain, Size: 1312 bytes --]

Hi Jakub,

> On Fri, Dec 08, 2017 at 01:47:35PM +0100, Rainer Orth wrote:
>> >> the new testcase FAILs on Solaris/x86 with /bin/as:
>> >> 
>> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++11 execution test
>> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++14 execution test
>> >> +FAIL: g++.dg/opt/pr83252.C  -std=gnu++98 execution test
>> >> 
>> >> ld.so.1: pr83252.exe: fatal: pr83252.exe: hardware capability
>> >> (CA_SUNW_HW_2) unsupported: 0x80 [ BMI2 ]
>> >> 
>> >> Inside gcc.target/i386, clearcap.exp takes care of that.
>> >
>> > This can't be in gcc.target/i386/, because the test has to be C++ (doesn't
>> > fail in C).
>> 
>> I see; hadn't checked...
>> 
>> > So dg-skip-if on Solaris, or { target { bmi2 && { ! *-*-solaris* } } } for
>> > the -mbmi2 option?
>> 
>> ... or { dg-additional-options "-mclear-hwcap" { *-*-solaris* } }
>
> If it works, sure.  I can't test it though.

it does if you add a "target" in the right place ;-)  Tested on
i386-pc-solaris2.11, sparc-sun-solaris2.11, and x86_64-pc-linux-gnu,
installed on mainline.

	Rainer

-- 
-----------------------------------------------------------------------------
Rainer Orth, Center for Biotechnology, Bielefeld University


2017-12-08  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* g++.dg/opt/pr83252.C: Add -mclear-hwcap on *-*-solaris*.


[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: sol2-testsuite-pr83252.patch --]
[-- Type: text/x-patch, Size: 565 bytes --]

# HG changeset patch
# Parent  a1d6e5b19ac25366630bf95a1d1d9b333b0b47ca
Disable hwcap on Solaris in g++.dg/opt/pr83252.C

diff --git a/gcc/testsuite/g++.dg/opt/pr83252.C b/gcc/testsuite/g++.dg/opt/pr83252.C
--- a/gcc/testsuite/g++.dg/opt/pr83252.C
+++ b/gcc/testsuite/g++.dg/opt/pr83252.C
@@ -2,6 +2,7 @@
 // { dg-do run }
 // { dg-options "-O3" }
 // { dg-additional-options "-mbmi2 -mtune=intel" { target bmi2 } }
+// { dg-additional-options "-mclear-hwcap" { target *-*-solaris* } }
 
 #if __SIZEOF_INT__ == 4 && __SIZEOF_LONG_LONG__ == 8 && __CHAR_BIT__ == 8