* [PATCH][i386,AVX] Enable VNNI support [5/5]
@ 2017-10-24 11:23 Koval, Julia
2017-12-08 8:10 ` Kirill Yukhin
0 siblings, 1 reply; 2+ messages in thread
From: Koval, Julia @ 2017-10-24 11:23 UTC (permalink / raw)
To: GCC Patches; +Cc: Kirill Yukhin
[-- Attachment #1: Type: text/plain, Size: 815 bytes --]
Hi,
This patch enables VPDPWSSDS instruction. The doc for isaset and instruction: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Ok for trunk?
Thanks,
Julia
gcc/
* config/i386/avx512vnniintrin.h (_mm512_dpwssds_epi32,
_mm512_mask_dpwssds_epi32, _mm512_maskz_dpwssds_epi32): New intrinsics.
* config/i386/avx512vnnivlintrin.h (_mm256_dpwssds_epi32,
_mm256_mask_dpwssds_epi32, _mm256_maskz_dpwssds_epi32,
_mm_dpwssds_epi32, _mm_mask_dpwssds_epi32,
_mm_maskz_dpwssds_epi32): Ditto.
gcc/testsuite/
* gcc.target/i386/avx512f-vnni-1.c: Add checks for vdpdwssds.
* gcc.target/i386/avx512vl-vnni-1.c: Ditto.
* gcc.target/i386/avx512f-vpdpwssds-2.c: New test.
* gcc.target/i386/avx512vl-vpdpwssds-2.c: Ditto.
[-- Attachment #2: 0014-VPDPWSSDS-instruction.patch --]
[-- Type: application/octet-stream, Size: 10789 bytes --]
From a1826642098bda94dac7a670d8fbb28513d3c571 Mon Sep 17 00:00:00 2001
From: "julia.koval" <jkoval@gkticlel801.igk.intel.com>
Date: Tue, 14 Mar 2017 13:21:37 +0300
Subject: [PATCH 14/14] VPDPWSSDS instruction
---
gcc/config/i386/avx512vnniintrin.h | 26 ++++++++
gcc/config/i386/avx512vnnivlintrin.h | 48 +++++++++++++++
gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c | 6 ++
.../gcc.target/i386/avx512f-vpdpwssds-2.c | 72 ++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c | 13 ++++
.../gcc.target/i386/avx512vl-vpdpwssds-2.c | 16 +++++
6 files changed, 181 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c
create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c
diff --git a/gcc/config/i386/avx512vnniintrin.h b/gcc/config/i386/avx512vnniintrin.h
index c435dc1..15ed76a 100644
--- a/gcc/config/i386/avx512vnniintrin.h
+++ b/gcc/config/i386/avx512vnniintrin.h
@@ -110,6 +110,32 @@ _mm512_maskz_dpwssd_epi32 (__mmask16 __A, __m512i __B, __m512i __C,
(__v16si) __C, (__v16si) __D, (__mmask16)__A);
}
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_dpwssds_epi32 (__m512i __A, __m512i __B, __m512i __C)
+{
+ return (__m512i) __builtin_ia32_vpdpwssds_v16si ((__v16si)__A, (__v16si) __B,
+ (__v16si) __C);
+}
+
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_mask_dpwssds_epi32 (__m512i __A, __mmask16 __B, __m512i __C,
+ __m512i __D)
+{
+ return (__m512i)__builtin_ia32_vpdpwssds_v16si_mask ((__v16si)__A,
+ (__v16si) __C, (__v16si) __D, (__mmask16)__B);
+}
+
+extern __inline __m512i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm512_maskz_dpwssds_epi32 (__mmask16 __A, __m512i __B, __m512i __C,
+ __m512i __D)
+{
+ return (__m512i)__builtin_ia32_vpdpwssds_v16si_maskz ((__v16si)__B,
+ (__v16si) __C, (__v16si) __D, (__mmask16)__A);
+}
+
#ifdef __DISABLE_AVX512VNNI__
#undef __DISABLE_AVX512VNNI__
#pragma GCC pop_options
diff --git a/gcc/config/i386/avx512vnnivlintrin.h b/gcc/config/i386/avx512vnnivlintrin.h
index d87feaa..3e1f8a2 100644
--- a/gcc/config/i386/avx512vnnivlintrin.h
+++ b/gcc/config/i386/avx512vnnivlintrin.h
@@ -179,6 +179,54 @@ _mm_maskz_dpwssd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
(__v4si) __C, (__v4si) __D, (__mmask8)__A);
}
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_dpwssds_epi32 (__m256i __A, __m256i __B, __m256i __C)
+{
+ return (__m256i) __builtin_ia32_vpdpwssds_v8si ((__v8si)__A, (__v8si) __B,
+ (__v8si) __C);
+}
+
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_mask_dpwssds_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D)
+{
+ return (__m256i)__builtin_ia32_vpdpwssds_v8si_mask ((__v8si)__A,
+ (__v8si) __C, (__v8si) __D, (__mmask8)__B);
+}
+
+extern __inline __m256i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm256_maskz_dpwssds_epi32 (__mmask8 __A, __m256i __B, __m256i __C,
+ __m256i __D)
+{
+ return (__m256i)__builtin_ia32_vpdpwssds_v8si_maskz ((__v8si)__B,
+ (__v8si) __C, (__v8si) __D, (__mmask8)__A);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_dpwssds_epi32 (__m128i __A, __m128i __B, __m128i __C)
+{
+ return (__m128i) __builtin_ia32_vpdpwssds_v4si ((__v4si)__A, (__v4si) __B,
+ (__v4si) __C);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_mask_dpwssds_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D)
+{
+ return (__m128i)__builtin_ia32_vpdpwssds_v4si_mask ((__v4si)__A,
+ (__v4si) __C, (__v4si) __D, (__mmask8)__B);
+}
+
+extern __inline __m128i
+__attribute__((__gnu_inline__, __always_inline__, __artificial__))
+_mm_maskz_dpwssds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D)
+{
+ return (__m128i)__builtin_ia32_vpdpwssds_v4si_maskz ((__v4si)__B,
+ (__v4si) __C, (__v4si) __D, (__mmask8)__A);
+}
#ifdef __DISABLE_AVX512VNNIVL__
#undef __DISABLE_AVX512VNNIVL__
#pragma GCC pop_options
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c
index d6c319b..9d34dc0 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c
@@ -9,6 +9,9 @@
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
@@ -32,4 +35,7 @@ avx512f_test (void)
x = _mm512_mask_dpwssd_epi32 (x, m16, y, z);
x = _mm512_maskz_dpwssd_epi32 (m16, x, y, z);
+ x = _mm512_dpwssds_epi32 (x, y, z);
+ x = _mm512_mask_dpwssds_epi32 (x, m16, y, z);
+ x = _mm512_maskz_dpwssds_epi32 (m16, x, y, z);
}
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c
new file mode 100644
index 0000000..41933f3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c
@@ -0,0 +1,72 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512f -mavx512vnni" } */
+/* { dg-require-effective-target avx512f } */
+/* { dg-require-effective-target avx512vnni } */
+
+#define AVX512F
+
+#define AVX512VNNI
+#include "avx512f-helper.h"
+
+#define SIZE (AVX512F_LEN / 16)
+#define SIZE_RES (AVX512F_LEN / 32)
+
+#include "avx512f-mask-type.h"
+
+static void
+CALC (int *r, int *dst, short *s1, short *s2)
+{
+ short tempres[SIZE];
+ for (int i = 0; i < SIZE; i++) {
+ tempres[i] = ((int)(s1[i]) * (int)(s2[i]));
+ }
+ for (int i = 0; i < SIZE_RES; i++) {
+ long long test = (long long)dst[i] + tempres[i*2] + tempres[i*2 + 1];
+ long long max_int = 0x7FFFFFFF;
+ if (test > max_int)
+ test = 0x7FFFFFFF;
+ r[i] = test;
+ }
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3;
+ UNION_TYPE (AVX512F_LEN, i_w) src1, src2;
+ MASK_TYPE mask = MASK_VALUE;
+ int res_ref[SIZE_RES];
+ int res_ref2[SIZE_RES];
+
+ for (i = 0; i < SIZE; i++)
+ {
+ src1.a[i] = 1 + i;
+ src2.a[i] = 2 + 2*i;
+ }
+
+ for (i = 0; i < SIZE_RES; i++)
+ {
+ res1.a[i] = 0x7fffffff;
+ res2.a[i] = DEFAULT_VALUE;
+ res3.a[i] = DEFAULT_VALUE;
+ }
+
+ CALC (res_ref, res1.a, src1.a, src2.a);
+ CALC (res_ref2, res2.a, src1.a, src2.a);
+
+ res1.x = INTRINSIC (_dpwssds_epi32) (res1.x, src1.x, src2.x);
+ res2.x = INTRINSIC (_mask_dpwssds_epi32) (res2.x, mask, src1.x, src2.x);
+ res3.x = INTRINSIC (_maskz_dpwssds_epi32) (mask, res3.x, src1.x, src2.x);
+
+ if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref))
+ abort ();
+
+ MASK_MERGE (i_d) (res_ref2, mask, SIZE_RES);
+ if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref2))
+ abort ();
+
+ MASK_ZERO (i_d) (res_ref2, mask, SIZE_RES);
+ if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref2))
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c
index aba9897..e63bc19 100644
--- a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c
@@ -18,6 +18,12 @@
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
@@ -53,4 +59,11 @@ avx512f_test (void)
x_ = _mm_mask_dpwssd_epi32 (x_, m, y_, z_);
x_ = _mm_maskz_dpwssd_epi32 (m, x_, y_, z_);
+ x = _mm256_dpwssds_epi32 (x, y, z);
+ x = _mm256_mask_dpwssds_epi32 (x, m, y, z);
+ x = _mm256_maskz_dpwssds_epi32 (m, x, y, z);
+
+ x_ = _mm_dpwssds_epi32 (x_, y_, z_);
+ x_ = _mm_mask_dpwssds_epi32 (x_, m, y_, z_);
+ x_ = _mm_maskz_dpwssds_epi32 (m, x_, y_, z_);
}
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c
new file mode 100644
index 0000000..9fd3d49
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c
@@ -0,0 +1,16 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512vnni -mavx512vl" } */
+/* { dg-require-effective-target avx512vl } */
+/* { dg-require-effective-target avx512vnni } */
+
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpdpwssds-2.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512f-vpdpwssds-2.c"
--
2.5.5
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH][i386,AVX] Enable VNNI support [5/5]
2017-10-24 11:23 [PATCH][i386,AVX] Enable VNNI support [5/5] Koval, Julia
@ 2017-12-08 8:10 ` Kirill Yukhin
0 siblings, 0 replies; 2+ messages in thread
From: Kirill Yukhin @ 2017-12-08 8:10 UTC (permalink / raw)
To: Koval, Julia; +Cc: GCC Patches
Hello Julia,
On 24 Oct 11:20, Koval, Julia wrote:
> Hi,
> This patch enables VPDPWSSDS instruction. The doc for isaset and instruction: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>
> Ok for trunk?
Your patch is OK for trunk. I've checked it in.
--
Thanks, K
>
> Thanks,
> Julia
^ permalink raw reply [flat|nested] 2+ messages in thread
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2017-12-08 8:10 ` Kirill Yukhin
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