* [PATCH, rs6000] Testcase fix-ups for gimple-folding intrinsic tests.
@ 2018-01-19 20:05 Will Schmidt
2018-01-19 21:58 ` Segher Boessenkool
0 siblings, 1 reply; 2+ messages in thread
From: Will Schmidt @ 2018-01-19 20:05 UTC (permalink / raw)
To: GCC Patches; +Cc: Segher Boessenkool, David Edelsohn, Bill Schmidt
Hi,
Some testcase fix-ups affecting the gimple-folding tests, including:
- Add xxspltib as a valid instruction for vec-abs tests (power9).
- Fix up mismatched dg-require and dg-option values for the
fold-vec-shift-left-longlong tests (fixes/eliminates a test failure on p6).
Sniff tested across P6,P8,P9.
OK for trunk?
Thanks,
-Will
[testsuite]
2018-01-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-abs-short-fwrap.c: Add xxspltib to
scan-asembler valid instructions list.
* gcc.target/powerpc/fold-vec-abs-short.c: Same.
* gcc.target/powerpc/fold-vec-shift-left-longlong.c: clean up
power8-vector requirement and option.
* gcc.target/powerpc/fold-vec-shift-left-fwrapv.c: Same.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short-fwrapv.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short-fwrapv.c
index 2562179..705bbe9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short-fwrapv.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short-fwrapv.c
@@ -11,8 +11,8 @@ vector signed short
test3 (vector signed short x)
{
return vec_abs (x);
}
-/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vspltisw|xxspltib|vxor" 1 } } */
/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsh" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c
index d312000..0ad850f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-abs-short.c
@@ -11,8 +11,8 @@ vector signed short
test3 (vector signed short x)
{
return vec_abs (x);
}
-/* { dg-final { scan-assembler-times "vspltisw|vxor" 1 } } */
+/* { dg-final { scan-assembler-times "vspltisw|xxspltib|vxor" 1 } } */
/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsh" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c
index b776683..486426a 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong-fwrapv.c
@@ -1,11 +1,11 @@
/* Verify that overloaded built-ins for vec_sl produce the right results. */
/* This test covers the shift left tests with the -fwrapv option. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O2 -mpower8-vector -fwrapv" } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -O2 -fwrapv" } */
#include <altivec.h>
vector signed long long
testsl_signed_longlong (vector signed long long x, vector unsigned long long y)
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c
index f040486..4116dbc 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-shift-left-longlong.c
@@ -1,11 +1,11 @@
/* cross section of shift tests specific for shift-left.
* This is a counterpart to the fold-vec-shift-left-frwapv test. */
/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -mpower8-vector -O2" } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-mpower8-vector -O2" } */
#include <altivec.h>
vector signed long long
testsl_signed_longlong (vector signed long long x, vector unsigned long long y)
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH, rs6000] Testcase fix-ups for gimple-folding intrinsic tests.
2018-01-19 20:05 [PATCH, rs6000] Testcase fix-ups for gimple-folding intrinsic tests Will Schmidt
@ 2018-01-19 21:58 ` Segher Boessenkool
0 siblings, 0 replies; 2+ messages in thread
From: Segher Boessenkool @ 2018-01-19 21:58 UTC (permalink / raw)
To: Will Schmidt; +Cc: GCC Patches, David Edelsohn, Bill Schmidt
Hi!
On Fri, Jan 19, 2018 at 01:14:08PM -0600, Will Schmidt wrote:
> Some testcase fix-ups affecting the gimple-folding tests, including:
> - Add xxspltib as a valid instruction for vec-abs tests (power9).
> - Fix up mismatched dg-require and dg-option values for the
> fold-vec-shift-left-longlong tests (fixes/eliminates a test failure on p6).
>
> Sniff tested across P6,P8,P9.
>
> OK for trunk?
> Thanks,
> -Will
This looks fine, okay for trunk, thanks! One typo:
> 2018-01-19 Will Schmidt <will_schmidt@vnet.ibm.com>
>
> * gcc.target/powerpc/fold-vec-abs-short-fwrap.c: Add xxspltib to
> scan-asembler valid instructions list.
> * gcc.target/powerpc/fold-vec-abs-short.c: Same.
> * gcc.target/powerpc/fold-vec-shift-left-longlong.c: clean up
> power8-vector requirement and option.
> * gcc.target/powerpc/fold-vec-shift-left-fwrapv.c: Same.
Segher
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2018-01-19 21:51 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-01-19 20:05 [PATCH, rs6000] Testcase fix-ups for gimple-folding intrinsic tests Will Schmidt
2018-01-19 21:58 ` Segher Boessenkool
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).