From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 73427 invoked by alias); 5 Feb 2018 14:01:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 72852 invoked by uid 89); 5 Feb 2018 14:01:40 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=Hx-languages-length:1848, hrm X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 05 Feb 2018 14:01:36 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w15E1XPq012361; Mon, 5 Feb 2018 08:01:33 -0600 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id w15E1WcN012360; Mon, 5 Feb 2018 08:01:32 -0600 Date: Mon, 05 Feb 2018 14:01:00 -0000 From: Segher Boessenkool To: Michael Meissner , GCC Patches , David Edelsohn , Bill Schmidt Subject: Re: [PATCH] PowerPC PR target/84154, fix floating point to small integer conversion regression Message-ID: <20180205140131.GT21977@gate.crashing.org> References: <20180201193116.GA15164@ibm-tiger.the-meissners.org> <20180205115724.GQ21977@gate.crashing.org> <20180205125457.GA20319@ibm-tiger.the-meissners.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180205125457.GA20319@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2018-02/txt/msg00175.txt.bz2 On Mon, Feb 05, 2018 at 07:54:58AM -0500, Michael Meissner wrote: > On Mon, Feb 05, 2018 at 05:57:25AM -0600, Segher Boessenkool wrote: > > On Thu, Feb 01, 2018 at 02:31:17PM -0500, Michael Meissner wrote: > > > This patch fixes the optimization regression that occurred on GCC 7 where > > > conversions from the various floating point types to small integers would at > > > times generate a store and a load. > > > > [ snip big explanation; thanks for that! ] > > > > Could you merge the signed and unsigned patterns, using any_fix? Or is > > there a reason that cannot work (other than that unsigned_fix seems > > buggy, it should say "u")? > > Well that's the way the instructions are. For traditional FPR instructions we > have FCTIWZ vs. FCTIWUZ, while on the VSX side we have XSCVDPSXWS > vs. XSCVDPUXWS. If you mean the name of the insn, I can change it if desired, > but originally it was based on the FPR insn name. We have (define_code_attr su [(sign_extend "s") (zero_extend "u") (fix "s") (unsigned_fix "s") (float "s") (unsigned_float "u")]) and "s" for unsigned_fix seems like it should be "u". Very surprising otherwise (if this is needed in some case, it should just write "s" there instead of ""). > > Okay for trunk even without that (but please try). Also okay for 7 after > > looking for fallout. > > In the past, I have found that combining code iterators with two mode iterators > has a bug where it would use the wrong code iterator, so I just avoided doing > that. I'll see if it is still a bug. Hrm. If you have multiple iterators you often need to use ":" syntax, and you might want that anyway because the precedence rules are non-obvious; but you are hitting something else? Please open a PR if so :-) Segher