[PATCH] RISC-V: Fix problems with ilp32e ABI support.

[PATCH] RISC-V: Fix problems with ilp32e ABI support.

[Jim Wilson]

Using -march=rv32i -mabi=ilp32e causes the high registers to be accidentally
used in the calling convention.  This is a problem with ABI related macros
checking the architecture for RVE support instead of the ABI for ilp32e
support, which is easy to fix.

This was tested with cross riscv32-elf builds using arch/abi combinations of
rv32i/ilp32 and rv32e/ilp32e.  There were no regressions.  This was also tested
by hand on the tescase in the PR to verify the right result.

	gcc/
	PR target/87391
	* config/riscv/riscv.h (STACK_BOUNDARY): Test riscv_abi == ABI_ILP32E
	not TARGET_RVE.
	(ABI_STACK_BOUNDARY, MAX_ARGS_IN_REGISTERS): Likewise.
---
 gcc/config/riscv/riscv.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 5651d1727f8..4bbb491ac87 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -126,10 +126,11 @@ along with GCC; see the file COPYING3.  If not see
 #define FUNCTION_BOUNDARY (TARGET_RVC ? 16 : 32)
 
 /* The smallest supported stack boundary the calling convention supports.  */
-#define STACK_BOUNDARY (TARGET_RVE ? BITS_PER_WORD : 2 * BITS_PER_WORD)
+#define STACK_BOUNDARY \
+  (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 2 * BITS_PER_WORD)
 
 /* The ABI stack alignment.  */
-#define ABI_STACK_BOUNDARY (TARGET_RVE ? BITS_PER_WORD : 128)
+#define ABI_STACK_BOUNDARY (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 128)
 
 /* There is no point aligning anything to a rounder boundary than this.  */
 #define BIGGEST_ALIGNMENT 128
@@ -492,7 +493,7 @@ enum reg_class
 #define GP_RETURN GP_ARG_FIRST
 #define FP_RETURN (UNITS_PER_FP_ARG == 0 ? GP_RETURN : FP_ARG_FIRST)
 
-#define MAX_ARGS_IN_REGISTERS (TARGET_RVE ? 6 : 8)
+#define MAX_ARGS_IN_REGISTERS (riscv_abi == ABI_ILP32E ? 6 : 8)
 
 /* Symbolic macros for the first/last argument registers.  */
 
-- 
2.17.1