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From: Christophe Lyon <christophe.lyon@st.com>
To: <gcc-patches@gcc.gnu.org>
Cc: <christophe.lyon@linaro.org>
Subject: [ARM/FDPIC v3 09/21] [ARM] FDPIC: Add support for taking address of nested function
Date: Thu, 11 Oct 2018 13:39:00 -0000	[thread overview]
Message-ID: <20181011133518.17258-10-christophe.lyon@st.com> (raw)
In-Reply-To: <20181011133518.17258-1-christophe.lyon@st.com>

In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:

	   .word	trampoline address
	   .word	trampoline GOT address
	   ldr 		r12, [pc, #8]
	   ldr 		r9, [pc, #8]
	   ldr		pc, [pc, #8]
	   .word	static chain value
	   .word	GOT address
	   .word	function's address

because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.

2018-XX-XX  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
	support.
	(arm_trampoline_init): Likewise.
	(arm_trampoline_init): Likewise.
	* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d0144fd..2a58d83 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -3954,13 +3954,50 @@ arm_warn_func_return (tree decl)
 	   .word	static chain value
 	   .word	function's address
    XXX FIXME: When the trampoline returns, r8 will be clobbered.  */
+/* In FDPIC mode, the trampoline looks like:
+	   .word	trampoline address
+	   .word	trampoline GOT address
+	   ldr 		r12, [pc, #8] ; #4 for Thumb2
+	   ldr 		r9,  [pc, #8] ; #4 for Thumb2
+	   ldr		pc,  [pc, #8] ; #4 for Thumb2
+	   .word	static chain value
+	   .word	GOT address
+	   .word	function's address
+*/
 
 static void
 arm_asm_trampoline_template (FILE *f)
 {
   fprintf (f, "\t.syntax unified\n");
 
-  if (TARGET_ARM)
+  if (TARGET_FDPIC)
+    {
+      /* The first two words are a function descriptor pointing to the
+	 trampoline code just below.  */
+      if (TARGET_ARM)
+	fprintf (f, "\t.arm\n");
+      else if (TARGET_THUMB2)
+	fprintf (f, "\t.thumb\n");
+      else
+	/* Only ARM and Thumb-2 are supported.  */
+	gcc_unreachable ();
+
+      assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+      assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+      /* Trampoline code which sets the static chain register but also
+	 PIC register before jumping into real code.  */
+      asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+		   STATIC_CHAIN_REGNUM, PC_REGNUM,
+		   TARGET_THUMB2 ? 8 : 4);
+      asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+		   PIC_OFFSET_TABLE_REGNUM, PC_REGNUM,
+		   TARGET_THUMB2 ? 8 : 4);
+      asm_fprintf (f, "\tldr\t%r, [%r, #%d]\n",
+		   PC_REGNUM, PC_REGNUM,
+		   TARGET_THUMB2 ? 8 : 4);
+      assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);
+    }
+  else if (TARGET_ARM)
     {
       fprintf (f, "\t.arm\n");
       asm_fprintf (f, "\tldr\t%r, [%r, #0]\n", STATIC_CHAIN_REGNUM, PC_REGNUM);
@@ -4001,12 +4038,40 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
   emit_block_move (m_tramp, assemble_trampoline_template (),
 		   GEN_INT (TRAMPOLINE_SIZE), BLOCK_OP_NORMAL);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
-  emit_move_insn (mem, chain_value);
+  if (TARGET_FDPIC)
+    {
+      rtx funcdesc = XEXP (DECL_RTL (fndecl), 0);
+      rtx fnaddr = gen_rtx_MEM (Pmode, funcdesc);
+      rtx gotaddr = gen_rtx_MEM (Pmode, plus_constant (Pmode, funcdesc, 4));
+      /* The function start address is at offset 8, but in Thumb mode
+	 we want bit 0 set to 1 to indicate Thumb-ness, hence 9
+	 below.  */
+      rtx trampoline_code_start
+	= plus_constant (Pmode, XEXP (m_tramp, 0), TARGET_THUMB2 ? 9 : 8);
+
+      /* Write initial funcdesc which points to the trampoline.  */
+      mem = adjust_address (m_tramp, SImode, 0);
+      emit_move_insn (mem, trampoline_code_start);
+      mem = adjust_address (m_tramp, SImode, 4);
+      emit_move_insn (mem, gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM));
+      /* Setup static chain.  */
+      mem = adjust_address (m_tramp, SImode, 20);
+      emit_move_insn (mem, chain_value);
+      /* GOT + real function entry point.  */
+      mem = adjust_address (m_tramp, SImode, 24);
+      emit_move_insn (mem, gotaddr);
+      mem = adjust_address (m_tramp, SImode, 28);
+      emit_move_insn (mem, fnaddr);
+    }
+  else
+    {
+      mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 8 : 12);
+      emit_move_insn (mem, chain_value);
 
-  mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
-  fnaddr = XEXP (DECL_RTL (fndecl), 0);
-  emit_move_insn (mem, fnaddr);
+      mem = adjust_address (m_tramp, SImode, TARGET_32BIT ? 12 : 16);
+      fnaddr = XEXP (DECL_RTL (fndecl), 0);
+      emit_move_insn (mem, fnaddr);
+    }
 
   a_tramp = XEXP (m_tramp, 0);
   emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"),
@@ -4020,7 +4085,9 @@ arm_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value)
 static rtx
 arm_trampoline_adjust_address (rtx addr)
 {
-  if (TARGET_THUMB)
+  /* For FDPIC don't fix trampoline address since it's a function
+     descriptor and not a function address.  */
+  if (TARGET_THUMB && !TARGET_FDPIC)
     addr = expand_simple_binop (Pmode, IOR, addr, const1_rtx,
 				NULL, 0, OPTAB_LIB_WIDEN);
   return addr;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 4671d64..22a65a1 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1581,7 +1581,7 @@ typedef struct
 #define INIT_EXPANDERS  arm_init_expanders ()
 
 /* Length in units of the trampoline for entering a nested function.  */
-#define TRAMPOLINE_SIZE  (TARGET_32BIT ? 16 : 20)
+#define TRAMPOLINE_SIZE  (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
 
 /* Alignment required for a trampoline in bits.  */
 #define TRAMPOLINE_ALIGNMENT  32
-- 
2.6.3

  parent reply	other threads:[~2018-10-11 13:38 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-11 13:36 [ARM/FDPIC v3 00/21] FDPIC ABI for ARM Christophe Lyon
2018-10-11 13:36 ` [ARM/FDPIC v3 01/21] [ARM] FDPIC: Add -mfdpic option support Christophe Lyon
2018-10-12 10:01   ` Richard Earnshaw (lists)
2018-10-17  8:13     ` Sandra Loosemore
2018-10-11 13:36 ` [ARM/FDPIC v3 02/21] [ARM] FDPIC: Handle arm*-*-uclinuxfdpiceabi in configure scripts Christophe Lyon
2018-10-12 10:14   ` Richard Earnshaw (lists)
2018-10-15  8:46     ` Christophe Lyon
2018-11-09 12:31       ` Christophe Lyon
2018-10-11 13:37 ` [ARM/FDPIC v3 04/21] [ARM] FDPIC: Add support for FDPIC for arm architecture Christophe Lyon
2018-10-12 11:02   ` Richard Earnshaw (lists)
2018-10-19 13:57     ` Christophe Lyon
2018-10-23 15:12       ` Richard Earnshaw (lists)
2018-10-26 16:34         ` Christophe Lyon
2018-10-26 16:41           ` Richard Earnshaw (lists)
2018-10-29 10:31             ` Christophe Lyon
2018-10-11 13:37 ` [ARM/FDPIC v3 05/21] [ARM] FDPIC: Fix __do_global_dtors_aux and frame_dummy generation Christophe Lyon
2018-10-12 11:29   ` Richard Earnshaw (lists)
2018-10-11 13:37 ` [ARM/FDPIC v3 03/21] [ARM] FDPIC: Force FDPIC related options unless -mno-fdpic is provided Christophe Lyon
2018-10-12 10:46   ` Richard Earnshaw (lists)
2018-10-15 10:35     ` Christophe Lyon
2018-10-23 15:01       ` Richard Earnshaw (lists)
2018-10-23 15:42         ` Segher Boessenkool
2018-10-26 15:33           ` Christophe Lyon
2018-10-29 14:25             ` Christophe Lyon
2018-10-29 23:15               ` Segher Boessenkool
2018-10-11 13:38 ` [ARM/FDPIC v3 07/21] [ARM] FDPIC: Avoid saving/restoring r9 on stack since it is RO Christophe Lyon
2018-10-12 12:21   ` Richard Earnshaw (lists)
2018-10-15 14:30     ` Christophe Lyon
2018-10-11 13:38 ` [ARM/FDPIC v3 08/21] [ARM] FDPIC: Ensure local/global binding for function descriptors Christophe Lyon
2018-10-12 12:39   ` Richard Earnshaw (lists)
2018-10-11 13:38 ` [ARM/FDPIC v3 06/21] [ARM] FDPIC: Add support for c++ exceptions Christophe Lyon
2018-10-12 11:54   ` Richard Earnshaw (lists)
2018-10-15 14:22     ` Christophe Lyon
2018-10-11 13:39 ` [ARM/FDPIC v3 10/21] [ARM] FDPIC: Implement TLS support Christophe Lyon
2018-10-11 13:39 ` [ARM/FDPIC v3 11/21] [ARM] FDPIC: Add support to unwind FDPIC signal frame Christophe Lyon
2018-10-11 13:39 ` Christophe Lyon [this message]
2018-10-11 13:40 ` [ARM/FDPIC v3 12/21] [ARM] FDPIC: Restore r9 after we call __aeabi_read_tp Christophe Lyon
2018-10-19 14:02   ` Christophe Lyon
2018-10-11 13:40 ` [ARM/FDPIC v3 13/21] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture Christophe Lyon
2018-10-11 13:41 ` [ARM/FDPIC v3 15/21] [ARM][testsuite] FDPIC: Adjust scan-assembler patterns Christophe Lyon
2018-10-11 13:41 ` [ARM/FDPIC v3 16/21] [ARM][testsuite] FDPIC: Skip v8-m and v6-m tests that currently produce an ICE Christophe Lyon
2018-10-11 13:41 ` [ARM/FDPIC v3 14/21] [ARM][testsuite] FDPIC: Skip unsupported tests Christophe Lyon
2018-10-11 13:42 ` [ARM/FDPIC v3 17/21] [ARM][testsuite] FDPIC: Skip tests that don't work in PIC mode Christophe Lyon
2018-10-11 13:42 ` [ARM/FDPIC v3 19/21] [ARM][testsuite] FDPIC: Enable tests on pie_enabled targets Christophe Lyon
2018-10-11 13:42 ` [ARM/FDPIC v3 18/21] [ARM][testsuite] FDPIC: Handle *-*-uclinux* Christophe Lyon
2018-10-11 13:43 ` [ARM/FDPIC v3 20/21] [ARM][testsuite] FDPIC: Adjust pr43698.c to avoid clash with uclibc Christophe Lyon
2018-10-11 13:56 ` [ARM/FDPIC v3 21/21] [ARM][testsuite] FDPIC: Skip tests using architecture older than v7 Christophe Lyon

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