From: Segher Boessenkool <segher@kernel.crashing.org>
To: Andrew Stubbs <ams@codesourcery.com>
Cc: Jeff Law <law@redhat.com>, gcc-patches@gcc.gnu.org
Subject: Re: [PATCH 21/25] GCN Back-end (part 2/2).
Date: Mon, 12 Nov 2018 17:20:00 -0000 [thread overview]
Message-ID: <20181112171958.GM23873@gate.crashing.org> (raw)
In-Reply-To: <4fe09f84-10d6-d30c-e458-27a4a3220eef@codesourcery.com>
On Mon, Nov 12, 2018 at 12:53:26PM +0000, Andrew Stubbs wrote:
> >>+/* Implement TARGET_LEGITIMATE_COMBINED_INSN.
> >>+
> >>+ Return false if the instruction is not appropriate as a combination
> >>of two
> >>+ or more instructions. */
> >>+
> >>+bool
> >>+gcn_legitimate_combined_insn (rtx_insn *insn)
> >>+{
> >>+ rtx pat = PATTERN (insn);
> >>+
> >>+ /* The combine pass tends to strip (use (exec)) patterns from insns.
> >>This
> >>+ means it basically switches everything to use the *_scalar form of
> >>the
> >>+ instructions, which is not helpful. So, this function disallows
> >>such
> >>+ combinations. Unfortunately, this also disallows combinations of
> >>genuine
> >>+ scalar-only patterns, but those only come from explicit expand code.
> >>+
> >>+ Possible solutions:
> >>+ - Invent TARGET_LEGITIMIZE_COMBINED_INSN.
> >>+ - Remove all (use (EXEC)) and rely on md_reorg with "exec"
> >>attribute.
> >>+ */
> >This seems a bit hokey. Why specifically is combine removing the USE?
>
> I don't understand combine fully enough to explain it now, although at
> the time I wrote this, and in a GCC 7 code base, I had followed the code
> through and observed what it was doing.
>
> Basically, if you have two patterns that do the same operation, but one
> has a "parallel" with an additional "use", then combine will tend to
> prefer the one without the "use". That doesn't stop the code working,
> but it makes a premature (accidental) decision about instruction
> selection that we'd prefer to leave to the register allocator.
>
> I don't recall if it did this to lone instructions, but it would
> certainly do so when combining two (or more) instructions, and IIRC
> there are typically plenty of simple moves around that can be easily
> combined.
If you don't want useless USEs deleted, use UNSPEC_VOLATILE instead?
Or actually use the register, i.e. as input to an actually needed
instruction.
If combine is changing an X and a USE to just that X if it can, combine
is doing a great job!
(combine cannot "combine" one instruction, fwiw; this sometime could be
useful (so just run simplification on every single instruction, see if
that makes a simpler valid instruction; and indeed a common case where it
can help is if the insn is a parallel and one of the arms of that isn't
needed).
Segher
next prev parent reply other threads:[~2018-11-12 17:20 UTC|newest]
Thread overview: 187+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-05 11:49 [PATCH 00/25] AMD GCN Port ams
2018-09-05 11:49 ` [PATCH 04/25] SPECIAL_REGNO_P ams
2018-09-05 12:21 ` Joseph Myers
2018-09-11 22:42 ` Jeff Law
2018-09-12 11:30 ` Andrew Stubbs
2018-09-13 10:03 ` Andrew Stubbs
2018-09-13 14:14 ` Andrew Stubbs
2018-09-13 14:39 ` Paul Koning
2018-09-13 14:49 ` Andrew Stubbs
2018-09-13 14:58 ` Paul Koning
2018-09-13 15:22 ` Andrew Stubbs
2018-09-13 17:13 ` Paul Koning
2018-09-17 22:59 ` Jeff Law
2018-10-04 19:13 ` Jeff Law
2018-09-12 15:31 ` Richard Henderson
2018-09-12 16:14 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 02/25] Propagate address spaces to builtins ams
2018-09-20 13:09 ` Richard Biener
2018-09-22 19:22 ` Andreas Schwab
2018-09-24 16:53 ` Andrew Stubbs
2018-09-24 17:40 ` Andreas Schwab
2018-09-25 14:27 ` [patch] Fix AArch64 ILP ICE Andrew Stubbs
2018-09-26 8:55 ` Andreas Schwab
2018-09-26 13:39 ` Richard Biener
2018-09-26 16:17 ` Andrew Stubbs
2019-09-03 14:01 ` [PATCH 02/25] Propagate address spaces to builtins Kyrill Tkachov
2019-09-03 15:00 ` Jeff Law
2019-09-04 14:21 ` Kyrill Tkachov
2019-09-04 15:29 ` Kyrill Tkachov
2019-09-03 15:43 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 05/25] Add sorry_at diagnostic function ams
2018-09-05 13:39 ` David Malcolm
2018-09-05 13:41 ` David Malcolm
2018-09-11 10:30 ` Andrew Stubbs
2018-09-05 11:49 ` [PATCH 01/25] Handle vectors that don't fit in an integer ams
2018-09-05 11:54 ` Jakub Jelinek
2018-09-14 16:03 ` Richard Sandiford
2018-11-15 17:20 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 07/25] [pr82089] Don't sign-extend SFV 1 in BImode ams
2018-09-17 8:46 ` Richard Sandiford
2018-09-26 15:52 ` Andrew Stubbs
2018-09-26 16:49 ` Richard Sandiford
2018-09-27 12:20 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 08/25] Fix co-array allocation ams
[not found] ` <7f5064c3-afc6-b7b5-cade-f03af5b86331@moene.org>
2018-09-05 18:07 ` Janne Blomqvist
2018-09-19 16:38 ` Andrew Stubbs
2018-09-19 22:27 ` Damian Rouson
2018-09-19 22:55 ` Andrew Stubbs
2018-09-20 1:21 ` Damian Rouson
2018-09-20 20:49 ` Thomas Koenig
2018-09-20 20:59 ` Damian Rouson
2018-09-21 7:38 ` Toon Moene
2018-09-23 11:57 ` Janne Blomqvist
2018-09-21 16:37 ` OpenCoarrays integration with gfortran Jerry DeLisle
2018-09-21 19:37 ` Janne Blomqvist
2018-09-21 19:44 ` Richard Biener
2018-09-21 20:25 ` Damian Rouson
2018-09-22 3:47 ` Jerry DeLisle
2018-09-23 10:41 ` Toon Moene
2018-09-23 18:03 ` Bernhard Reutner-Fischer
2018-09-24 11:14 ` Alastair McKinstry
2018-09-27 12:51 ` Richard Biener
2018-09-20 15:59 ` [PATCH 08/25] Fix co-array allocation Janne Blomqvist
2018-09-20 16:37 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 09/25] Elide repeated RTL elements ams
2018-09-11 22:46 ` Jeff Law
2018-09-12 8:47 ` Andrew Stubbs
2018-09-12 15:14 ` Jeff Law
2018-09-19 17:25 ` Andrew Stubbs
2018-09-20 11:42 ` Andrew Stubbs
2018-09-26 16:23 ` Andrew Stubbs
2018-10-04 18:24 ` Jeff Law
2018-10-11 14:28 ` Andrew Stubbs
2018-09-05 11:50 ` [PATCH 06/25] Remove constant vec_select restriction ams
2018-09-11 22:44 ` Jeff Law
2018-09-05 11:50 ` [PATCH 03/25] Improve TARGET_MANGLE_DECL_ASSEMBLER_NAME ams
2018-09-11 22:56 ` Jeff Law
2018-09-12 14:43 ` Richard Biener
2018-09-12 15:07 ` Jeff Law
2018-09-12 15:16 ` Richard Biener
2018-09-12 16:32 ` Andrew Stubbs
2018-09-12 17:39 ` Julian Brown
2018-09-15 6:01 ` Julian Brown
2018-09-19 15:23 ` Julian Brown
2018-09-20 12:36 ` Richard Biener
2018-09-05 11:50 ` [PATCH 10/25] Convert BImode vectors ams
2018-09-05 11:56 ` Jakub Jelinek
2018-09-05 12:05 ` Richard Biener
2018-09-05 12:40 ` Andrew Stubbs
2018-09-05 12:44 ` Richard Biener
2018-09-11 14:36 ` Andrew Stubbs
2018-09-12 14:37 ` Richard Biener
2018-09-17 8:51 ` Richard Sandiford
2018-09-05 11:50 ` [PATCH 12/25] Make default_static_chain return NULL in non-static functions ams
2018-09-17 18:55 ` Richard Sandiford
2018-09-28 14:23 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 14/25] Disable inefficient vectorization of elementwise loads/stores ams
2018-09-17 9:16 ` Richard Sandiford
2018-09-17 9:54 ` Andrew Stubbs
2018-09-17 12:40 ` Richard Sandiford
2018-09-17 12:46 ` Andrew Stubbs
2018-09-20 13:01 ` Richard Biener
2018-09-20 13:51 ` Richard Sandiford
2018-09-20 14:14 ` Richard Biener
2018-09-20 14:22 ` Richard Sandiford
2018-09-05 11:51 ` [PATCH 17/25] Fix Fortran STOP ams
[not found] ` <c0630914-1252-1391-9bf9-f03434d46f5a@moene.org>
2018-09-05 18:09 ` Janne Blomqvist
2018-09-12 13:56 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 13/25] Create TARGET_DISABLE_CURRENT_VECTOR_SIZE ams
2018-09-17 19:31 ` Richard Sandiford
2018-09-18 9:02 ` Andrew Stubbs
2018-09-18 11:30 ` Richard Sandiford
2018-09-18 20:27 ` Andrew Stubbs
2018-09-19 13:46 ` Richard Biener
2018-09-28 12:48 ` Andrew Stubbs
2018-10-01 8:05 ` Richard Biener
2018-09-05 11:51 ` [PATCH 16/25] Fix IRA ICE ams
2018-09-17 9:36 ` Richard Sandiford
2018-09-18 22:00 ` Andrew Stubbs
2018-09-20 12:47 ` Richard Sandiford
2018-09-20 13:36 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 18/25] Fix interleaving of Fortran stop messages ams
[not found] ` <994a9ec6-2494-9a83-cc84-bd8a551142c5@moene.org>
2018-09-05 18:11 ` Janne Blomqvist
2018-09-12 13:55 ` Andrew Stubbs
2018-09-05 11:51 ` [PATCH 11/25] Simplify vec_merge according to the mask ams
2018-09-17 9:08 ` Richard Sandiford
2018-09-20 15:44 ` Andrew Stubbs
2018-09-26 16:26 ` Andrew Stubbs
2018-09-26 16:50 ` Richard Sandiford
2018-09-26 17:06 ` Andrew Stubbs
2018-09-27 7:28 ` Richard Sandiford
2018-09-27 14:13 ` Andrew Stubbs
2018-09-27 16:28 ` Richard Sandiford
2018-09-27 21:14 ` Andrew Stubbs
2018-09-28 8:42 ` Richard Sandiford
2018-09-28 13:50 ` Andrew Stubbs
2019-02-22 3:40 ` H.J. Lu
2018-09-05 11:51 ` [PATCH 15/25] Don't double-count early-clobber matches ams
2018-09-17 9:22 ` Richard Sandiford
2018-09-27 22:54 ` Andrew Stubbs
2018-10-04 22:43 ` Richard Sandiford
2018-10-22 15:36 ` Andrew Stubbs
2018-09-05 11:52 ` [PATCH 20/25] GCN libgcc ams
2018-09-05 12:32 ` Joseph Myers
2018-11-09 18:49 ` Jeff Law
2018-11-12 12:01 ` Andrew Stubbs
2018-09-05 11:52 ` [PATCH 22/25] Add dg-require-effective-target exceptions ams
2018-09-17 9:40 ` Richard Sandiford
2018-09-17 17:53 ` Mike Stump
2018-09-20 16:10 ` Andrew Stubbs
2018-09-05 11:52 ` [PATCH 24/25] Ignore LLVM's blank lines ams
2018-09-14 16:19 ` Jeff Law
2020-03-23 15:29 ` Thomas Schwinge
2020-03-24 21:05 ` Thomas Schwinge
2018-09-05 11:52 ` [PATCH 23/25] Testsuite: GCN is always PIE ams
2018-09-14 16:39 ` Jeff Law
2018-09-05 11:52 ` [PATCH 19/25] GCN libgfortran ams
[not found] ` <41281e27-ad85-e50c-8fed-6f4f6f18289c@moene.org>
2018-09-05 18:14 ` Janne Blomqvist
2018-09-06 12:37 ` Andrew Stubbs
2018-09-11 22:47 ` Jeff Law
2018-09-05 11:53 ` [PATCH 25/25] Port testsuite to GCN ams
2018-09-05 13:40 ` [PATCH 21/25] GCN Back-end (part 1/2) Andrew Stubbs
2018-11-09 19:11 ` Jeff Law
2018-11-12 12:13 ` Andrew Stubbs
2018-09-05 13:43 ` [PATCH 21/25] GCN Back-end (part 2/2) Andrew Stubbs
2018-09-05 14:22 ` Joseph Myers
2018-09-05 14:35 ` Andrew Stubbs
2018-09-05 14:44 ` Joseph Myers
2018-09-11 16:25 ` Andrew Stubbs
2018-09-11 16:41 ` Joseph Myers
2018-09-12 13:42 ` Andrew Stubbs
2018-09-12 15:32 ` Joseph Myers
2018-09-12 16:46 ` Andrew Stubbs
2018-09-12 16:50 ` Joseph Myers
2018-11-09 19:40 ` Jeff Law
2018-11-12 12:53 ` Andrew Stubbs
2018-11-12 17:20 ` Segher Boessenkool [this message]
2018-11-12 17:52 ` Andrew Stubbs
2018-11-12 18:33 ` Segher Boessenkool
2018-11-12 18:55 ` Jeff Law
2018-11-13 10:23 ` Andrew Stubbs
2018-11-13 10:33 ` Segher Boessenkool
2018-11-16 16:10 ` Segher Boessenkool
2018-11-17 14:07 ` Segher Boessenkool
2018-11-14 22:31 ` Jeff Law
2018-11-15 9:55 ` Andrew Stubbs
2018-11-16 13:33 ` Andrew Stubbs
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