* [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)
@ 2018-11-13 9:28 Jakub Jelinek
2018-11-13 14:00 ` Kyrill Tkachov
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Jakub Jelinek @ 2018-11-13 9:28 UTC (permalink / raw)
To: Richard Earnshaw, James Greenhalgh, Marcus Shawcroft; +Cc: gcc-patches
Hi!
The following testcase ICEs because the predicate and constraints on one of
the operands of @aarch64_compare_and_swapdi aren't consistent. The RA which
goes according to constraints
(insn 15 13 16 2 (set (reg:DI 104)
(const_int 8589934595 [0x200000003])) "pr87839.c":15:3 47 {*movdi_aarch64}
(expr_list:REG_EQUIV (const_int 8589934595 [0x200000003])
(nil)))
(insn 16 15 21 2 (parallel [
(set (reg:CC 66 cc)
(unspec_volatile:CC [
(const_int 0 [0])
] UNSPECV_ATOMIC_CMPSW))
(set (reg:DI 101)
(mem/v:DI (reg/f:DI 99) [-1 S8 A64]))
(set (mem/v:DI (reg/f:DI 99) [-1 S8 A64])
(unspec_volatile:DI [
(reg:DI 104)
(reg:DI 103)
(const_int 0 [0])
(const_int 32773 [0x8005]) repeated x2
] UNSPECV_ATOMIC_CMPSW))
(clobber (scratch:SI))
]) "pr87839.c":15:3 3532 {aarch64_compare_and_swapdi}
(expr_list:REG_UNUSED (reg:DI 101)
(expr_list:REG_UNUSED (reg:CC 66 cc)
(nil))))
when seeing n constraint puts the 0x200000003 constant directly into the
atomic instruction, but the predicate requires that it is either a register,
or shifted positive or negative 12-bit constant and so it fails to split.
The positive shifted constant apparently has I constraint and negative one
J, and other uses of aarch64_plus_operand that have some constraint use
rIJ (or r):
config/aarch64/aarch64.md: (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J"))
config/aarch64/aarch64.md: (match_operand:SI 2 "aarch64_plus_operand" "r,I,J"))
config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J"))
config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r"))
config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
I don't have a setup to easily bootstrap/regtest aarch64-linux ATM, could
somebody please include it in their bootstrap/regtest? Thanks.
2018-11-13 Jakub Jelinek <jakub@redhat.com>
PR target/87839
* config/aarch64/atomics.md (@aarch64_compare_and_swap<mode>): Use
rIJ constraint for aarch64_plus_operand rather than rn.
* gcc.target/aarch64/pr87839.c: New test.
--- gcc/config/aarch64/atomics.md.jj 2018-11-01 12:06:43.469963662 +0100
+++ gcc/config/aarch64/atomics.md 2018-11-13 09:59:35.660185116 +0100
@@ -71,7 +71,7 @@ (define_insn_and_split "@aarch64_compare
(match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
(set (match_dup 1)
(unspec_volatile:GPI
- [(match_operand:GPI 2 "aarch64_plus_operand" "rn") ;; expect
+ [(match_operand:GPI 2 "aarch64_plus_operand" "rIJ") ;; expect
(match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired
(match_operand:SI 4 "const_int_operand") ;; is_weak
(match_operand:SI 5 "const_int_operand") ;; mod_s
--- gcc/testsuite/gcc.target/aarch64/pr87839.c.jj 2018-11-13 10:13:44.353309416 +0100
+++ gcc/testsuite/gcc.target/aarch64/pr87839.c 2018-11-13 10:13:05.496944699 +0100
@@ -0,0 +1,29 @@
+/* PR target/87839 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -w" } */
+
+long long b[64];
+void foo (void);
+int bar (void (*) (void));
+void qux (long long *, long long) __attribute__((noreturn));
+void quux (long long *, long long);
+
+void
+baz (void)
+{
+ __sync_val_compare_and_swap (b, 4294967298LL, 78187493520LL);
+ __sync_bool_compare_and_swap (b + 1, 8589934595LL, 21474836489LL);
+ __sync_fetch_and_xor (b, 60129542145LL);
+ quux (b, 42949672967LL);
+ __sync_xor_and_fetch (b + 22, 60129542145LL);
+ quux (b + 23, 42949672967LL);
+ if (bar (baz))
+ __builtin_abort ();
+ foo ();
+ __sync_val_compare_and_swap (b, 4294967298LL, 0);
+ __sync_bool_compare_and_swap (b + 1, 8589934595LL, 78187493520LL);
+ if (__sync_or_and_fetch (b, 21474836489LL) != 21474836489LL)
+ qux (b + 22, 60129542145LL);
+ __atomic_fetch_nand (b + 23, 42949672967LL, __ATOMIC_RELAXED);
+ bar (baz);
+}
Jakub
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)
2018-11-13 9:28 [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839) Jakub Jelinek
@ 2018-11-13 14:00 ` Kyrill Tkachov
2018-11-19 7:29 ` Richard Henderson
2018-11-20 17:04 ` Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)) Jakub Jelinek
2 siblings, 0 replies; 5+ messages in thread
From: Kyrill Tkachov @ 2018-11-13 14:00 UTC (permalink / raw)
To: Jakub Jelinek, Richard Earnshaw, James Greenhalgh, Marcus Shawcroft
Cc: gcc-patches
Hi Jakub,
On 13/11/18 09:28, Jakub Jelinek wrote:
> Hi!
>
> The following testcase ICEs because the predicate and constraints on one of
> the operands of @aarch64_compare_and_swapdi aren't consistent. The RA which
> goes according to constraints
> (insn 15 13 16 2 (set (reg:DI 104)
> (const_int 8589934595 [0x200000003])) "pr87839.c":15:3 47 {*movdi_aarch64}
> (expr_list:REG_EQUIV (const_int 8589934595 [0x200000003])
> (nil)))
> (insn 16 15 21 2 (parallel [
> (set (reg:CC 66 cc)
> (unspec_volatile:CC [
> (const_int 0 [0])
> ] UNSPECV_ATOMIC_CMPSW))
> (set (reg:DI 101)
> (mem/v:DI (reg/f:DI 99) [-1 S8 A64]))
> (set (mem/v:DI (reg/f:DI 99) [-1 S8 A64])
> (unspec_volatile:DI [
> (reg:DI 104)
> (reg:DI 103)
> (const_int 0 [0])
> (const_int 32773 [0x8005]) repeated x2
> ] UNSPECV_ATOMIC_CMPSW))
> (clobber (scratch:SI))
> ]) "pr87839.c":15:3 3532 {aarch64_compare_and_swapdi}
> (expr_list:REG_UNUSED (reg:DI 101)
> (expr_list:REG_UNUSED (reg:CC 66 cc)
> (nil))))
> when seeing n constraint puts the 0x200000003 constant directly into the
> atomic instruction, but the predicate requires that it is either a register,
> or shifted positive or negative 12-bit constant and so it fails to split.
> The positive shifted constant apparently has I constraint and negative one
> J, and other uses of aarch64_plus_operand that have some constraint use
> rIJ (or r):
> config/aarch64/aarch64.md: (match_operand:GPI 2 "aarch64_plus_operand" "r,I,J"))
> config/aarch64/aarch64.md: (match_operand:SI 2 "aarch64_plus_operand" "r,I,J"))
> config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J"))
> config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r"))
> config/aarch64/aarch64.md: (match_operand:GPI 1 "aarch64_plus_operand" "r,I,J")))]
>
> I don't have a setup to easily bootstrap/regtest aarch64-linux ATM, could
> somebody please include it in their bootstrap/regtest? Thanks.
>
> 2018-11-13 Jakub Jelinek <jakub@redhat.com>
>
> PR target/87839
> * config/aarch64/atomics.md (@aarch64_compare_and_swap<mode>): Use
> rIJ constraint for aarch64_plus_operand rather than rn.
>
> * gcc.target/aarch64/pr87839.c: New test.
>
This passes bootstrap and regtesting shows no problems on aarch64-none-linux-gnu.
The change looks good to me but you'll still need maintainer approval.
Thanks,
Kyrill
> --- gcc/config/aarch64/atomics.md.jj 2018-11-01 12:06:43.469963662 +0100
> +++ gcc/config/aarch64/atomics.md 2018-11-13 09:59:35.660185116 +0100
> @@ -71,7 +71,7 @@ (define_insn_and_split "@aarch64_compare
> (match_operand:GPI 1 "aarch64_sync_memory_operand" "+Q")) ;; memory
> (set (match_dup 1)
> (unspec_volatile:GPI
> - [(match_operand:GPI 2 "aarch64_plus_operand" "rn") ;; expect
> + [(match_operand:GPI 2 "aarch64_plus_operand" "rIJ") ;; expect
> (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired
> (match_operand:SI 4 "const_int_operand") ;; is_weak
> (match_operand:SI 5 "const_int_operand") ;; mod_s
> --- gcc/testsuite/gcc.target/aarch64/pr87839.c.jj 2018-11-13 10:13:44.353309416 +0100
> +++ gcc/testsuite/gcc.target/aarch64/pr87839.c 2018-11-13 10:13:05.496944699 +0100
> @@ -0,0 +1,29 @@
> +/* PR target/87839 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -w" } */
> +
> +long long b[64];
> +void foo (void);
> +int bar (void (*) (void));
> +void qux (long long *, long long) __attribute__((noreturn));
> +void quux (long long *, long long);
> +
> +void
> +baz (void)
> +{
> + __sync_val_compare_and_swap (b, 4294967298LL, 78187493520LL);
> + __sync_bool_compare_and_swap (b + 1, 8589934595LL, 21474836489LL);
> + __sync_fetch_and_xor (b, 60129542145LL);
> + quux (b, 42949672967LL);
> + __sync_xor_and_fetch (b + 22, 60129542145LL);
> + quux (b + 23, 42949672967LL);
> + if (bar (baz))
> + __builtin_abort ();
> + foo ();
> + __sync_val_compare_and_swap (b, 4294967298LL, 0);
> + __sync_bool_compare_and_swap (b + 1, 8589934595LL, 78187493520LL);
> + if (__sync_or_and_fetch (b, 21474836489LL) != 21474836489LL)
> + qux (b + 22, 60129542145LL);
> + __atomic_fetch_nand (b + 23, 42949672967LL, __ATOMIC_RELAXED);
> + bar (baz);
> +}
>
> Jakub
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)
2018-11-13 9:28 [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839) Jakub Jelinek
2018-11-13 14:00 ` Kyrill Tkachov
@ 2018-11-19 7:29 ` Richard Henderson
2018-11-20 17:04 ` Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)) Jakub Jelinek
2 siblings, 0 replies; 5+ messages in thread
From: Richard Henderson @ 2018-11-19 7:29 UTC (permalink / raw)
To: Jakub Jelinek, Richard Earnshaw, James Greenhalgh, Marcus Shawcroft
Cc: gcc-patches
On 11/13/18 10:28 AM, Jakub Jelinek wrote:
> - [(match_operand:GPI 2 "aarch64_plus_operand" "rn") ;; expect
> + [(match_operand:GPI 2 "aarch64_plus_operand" "rIJ") ;; expect
Ah, yes. That's my bug. There is a similar one just above wrt
aarch64_compare_and_swap<HI>, and that one needs a new constraint in order to
handle it.
I'll send a patch.
r~
^ permalink raw reply [flat|nested] 5+ messages in thread
* Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839))
2018-11-13 9:28 [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839) Jakub Jelinek
2018-11-13 14:00 ` Kyrill Tkachov
2018-11-19 7:29 ` Richard Henderson
@ 2018-11-20 17:04 ` Jakub Jelinek
2018-11-21 16:13 ` James Greenhalgh
2 siblings, 1 reply; 5+ messages in thread
From: Jakub Jelinek @ 2018-11-20 17:04 UTC (permalink / raw)
To: Richard Earnshaw, James Greenhalgh, Marcus Shawcroft; +Cc: gcc-patches
Hi!
On Tue, Nov 13, 2018 at 10:28:16AM +0100, Jakub Jelinek wrote:
> 2018-11-13 Jakub Jelinek <jakub@redhat.com>
>
> PR target/87839
> * config/aarch64/atomics.md (@aarch64_compare_and_swap<mode>): Use
> rIJ constraint for aarch64_plus_operand rather than rn.
>
> * gcc.target/aarch64/pr87839.c: New test.
I'd like to ping this patch, Kyrill had kindly tested it, ok for trunk?
Jakub
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839))
2018-11-20 17:04 ` Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)) Jakub Jelinek
@ 2018-11-21 16:13 ` James Greenhalgh
0 siblings, 0 replies; 5+ messages in thread
From: James Greenhalgh @ 2018-11-21 16:13 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: Richard Earnshaw, Marcus Shawcroft, gcc-patches, nd
On Tue, Nov 20, 2018 at 11:04:46AM -0600, Jakub Jelinek wrote:
> Hi!
>
> On Tue, Nov 13, 2018 at 10:28:16AM +0100, Jakub Jelinek wrote:
> > 2018-11-13 Jakub Jelinek <jakub@redhat.com>
> >
> > PR target/87839
> > * config/aarch64/atomics.md (@aarch64_compare_and_swap<mode>): Use
> > rIJ constraint for aarch64_plus_operand rather than rn.
> >
> > * gcc.target/aarch64/pr87839.c: New test.
>
> I'd like to ping this patch, Kyrill had kindly tested it, ok for trunk?
OK.
Thanks,
James
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2018-11-21 16:13 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-11-13 9:28 [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839) Jakub Jelinek
2018-11-13 14:00 ` Kyrill Tkachov
2018-11-19 7:29 ` Richard Henderson
2018-11-20 17:04 ` Patch ping (was Re: [PATCH] Fix aarch64_compare_and_swap* constraints (PR target/87839)) Jakub Jelinek
2018-11-21 16:13 ` James Greenhalgh
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).