From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 113555 invoked by alias); 10 Jan 2019 11:05:49 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 113538 invoked by uid 89); 10 Jan 2019 11:05:48 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=pov, stage4 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 10 Jan 2019 11:05:47 +0000 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BF6AD804FA; Thu, 10 Jan 2019 11:05:45 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-116-18.ams2.redhat.com [10.36.116.18]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4C31817CF9; Thu, 10 Jan 2019 11:05:45 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id x0AB5gXW028279; Thu, 10 Jan 2019 12:05:43 +0100 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id x0AB5e3u028278; Thu, 10 Jan 2019 12:05:40 +0100 Date: Thu, 10 Jan 2019 11:05:00 -0000 From: Jakub Jelinek To: Ramana Radhakrishnan Cc: Ramana Radhakrishnan , James Greenhalgh , Richard Earnshaw , Marcus Shawcroft , "gcc-patches@gcc.gnu.org" , Ard Biesheuvel , Will Deacon , Mark Rutland , nd Subject: Re: [RFC][AArch64] Add support for system register based stack protector canary access Message-ID: <20190110110540.GW30353@tucnak> Reply-To: Jakub Jelinek References: <7a5a57fa-629d-d2ff-6292-e0893647ec8a@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-IsSubscribed: yes X-SW-Source: 2019-01/txt/msg00529.txt.bz2 On Thu, Jan 10, 2019 at 10:53:32AM +0000, Ramana Radhakrishnan wrote: > > 2018-11-23 Ramana Radhakrishnan > > > > * config/aarch64/aarch64-opts.h (enum stack_protector_guard): New > > * config/aarch64/aarch64.c (aarch64_override_options_internal): > > Handle > > and put in error checks for stack protector guard options. > > (aarch64_stack_protect_guard): New. > > (TARGET_STACK_PROTECT_GUARD): Define. > > * config/aarch64/aarch64.md (UNSPEC_SSP_SYSREG): New. > > (reg_stack_protect_address): New. > > (stack_protect_set): Adjust for SSP_GLOBAL. > > (stack_protect_test): Likewise. > > * config/aarch64/aarch64.opt (-mstack-protector-guard-reg): New. > > (-mstack-protector-guard): Likewise. > > (-mstack-protector-guard-offset): Likewise. > > * doc/invoke.texi: Document new AArch64 options. > > Any further thoughts or is it just Jakub's comments that I need to > address on this patch ? It looks like the kernel folks have queued > this for the next kernel release and given this is helping the kernel > with a security feature, can we move this forward ? >From RM POV this is ok in stage4 if you commit it RSN. Both x86 and powerpc have -mstack-protector-guard{,-reg,-offset}= options, x86 even has -mstack-protector-guard-symbol=. So it would be nice if the aarch64 options are compatible with those other arches. Please make sure you don't regress non-glibc SSP support (don't repeat PR85644/PR86832). Jakub