From: "H.J. Lu" <hjl.tools@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: Uros Bizjak <ubizjak@gmail.com>
Subject: [PATCH 22/43] i386: Emulate MMX mmx_uavgv8qi3 with SSE
Date: Sun, 10 Feb 2019 00:23:00 -0000 [thread overview]
Message-ID: <20190210001947.27278-23-hjl.tools@gmail.com> (raw)
In-Reply-To: <20190210001947.27278-1-hjl.tools@gmail.com>
Emulate MMX mmx_uavgv8qi3 with SSE. Only SSE register source operand is
allowed.
PR target/89021
* config/i386/mmx.md (mmx_uavgv8qi3): Add SSE emulation support.
(*mmx_uavgv8qi3): Add SSE emulation.
---
gcc/config/i386/mmx.md | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 0e5bfe6baff..38743ea10fd 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1684,42 +1684,47 @@
(const_int 1) (const_int 1)
(const_int 1) (const_int 1)]))
(const_int 1))))]
- "TARGET_SSE || TARGET_3DNOW"
+ "((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
+ || TARGET_3DNOW"
"ix86_fixup_binary_operands_no_copy (PLUS, V8QImode, operands);")
(define_insn "*mmx_uavgv8qi3"
- [(set (match_operand:V8QI 0 "register_operand" "=y")
+ [(set (match_operand:V8QI 0 "register_operand" "=y,x,Yv")
(truncate:V8QI
(lshiftrt:V8HI
(plus:V8HI
(plus:V8HI
(zero_extend:V8HI
- (match_operand:V8QI 1 "nonimmediate_operand" "%0"))
+ (match_operand:V8QI 1 "nonimmediate_operand" "%0,0,Yv"))
(zero_extend:V8HI
- (match_operand:V8QI 2 "nonimmediate_operand" "ym")))
+ (match_operand:V8QI 2 "nonimmediate_operand" "ym,x,Yv")))
(const_vector:V8HI [(const_int 1) (const_int 1)
(const_int 1) (const_int 1)
(const_int 1) (const_int 1)
(const_int 1) (const_int 1)]))
(const_int 1))))]
- "(TARGET_SSE || TARGET_3DNOW)
+ "(((TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE)
+ || TARGET_3DNOW_A)
&& ix86_binary_operator_ok (PLUS, V8QImode, operands)"
{
/* These two instructions have the same operation, but their encoding
is different. Prefer the one that is de facto standard. */
- if (TARGET_SSE || TARGET_3DNOW_A)
+ if (TARGET_MMX_WITH_SSE && TARGET_AVX)
+ return "vpavgb\t{%2, %1, %0|%0, %1, %2}";
+ else if (TARGET_SSE || TARGET_3DNOW_A)
return "pavgb\t{%2, %0|%0, %2}";
else
return "pavgusb\t{%2, %0|%0, %2}";
}
- [(set_attr "type" "mmxshft")
+ [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
+ (set_attr "type" "mmxshft,sseiadd,sseiadd")
(set (attr "prefix_extra")
(if_then_else
(not (ior (match_test "TARGET_SSE")
(match_test "TARGET_3DNOW_A")))
(const_string "1")
(const_string "*")))
- (set_attr "mode" "DI")])
+ (set_attr "mode" "DI,TI,TI")])
(define_expand "mmx_uavgv4hi3"
[(set (match_operand:V4HI 0 "register_operand")
--
2.20.1
next prev parent reply other threads:[~2019-02-10 0:23 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-10 0:19 [PATCH 00/43] V3: Emulate MMX intrinsics " H.J. Lu
2019-02-10 0:19 ` [PATCH 03/43] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX H.J. Lu
2019-02-10 10:07 ` Uros Bizjak
2019-02-10 0:19 ` [PATCH 05/43] i386: Emulate MMX mulv4hi3 with SSE H.J. Lu
2019-02-10 0:19 ` [PATCH 04/43] i386: Emulate MMX plusminus/sat_plusminus " H.J. Lu
2019-02-10 10:12 ` Uros Bizjak
2019-02-10 0:19 ` [PATCH 02/43] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 H.J. Lu
2019-02-10 9:56 ` Uros Bizjak
2019-02-10 10:04 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 13/43] i386: Emulate MMX pshufw with SSE H.J. Lu
2019-02-10 11:16 ` Uros Bizjak
2019-02-11 18:09 ` H.J. Lu
2019-02-11 19:36 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 34/43] i386: Emulate MMX abs<mode>2 " H.J. Lu
2019-02-10 12:32 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 01/43] i386: Allow 64-bit vector modes in SSE registers H.J. Lu
2019-02-10 9:43 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 28/43] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE H.J. Lu
2019-02-10 12:24 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 11/43] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 " H.J. Lu
2019-02-10 10:33 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 15/43] i386: Emulate MMX sse_cvtpi2ps " H.J. Lu
2019-02-10 10:56 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 43/43] i386: Implement V2SF comparisons " H.J. Lu
2019-02-10 0:20 ` [PATCH 08/43] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
2019-02-10 10:26 ` Uros Bizjak
2019-02-10 20:38 ` H.J. Lu
2019-02-10 20:49 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 06/43] i386: Emulate MMX smulv4hi3_highpart " H.J. Lu
2019-02-10 10:18 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 12/43] i386: Emulate MMX vec_dupv2si " H.J. Lu
2019-02-10 10:36 ` Uros Bizjak
2019-02-10 21:01 ` H.J. Lu
2019-02-10 21:46 ` Uros Bizjak
2019-02-10 21:49 ` Uros Bizjak
2019-02-11 1:04 ` H.J. Lu
2019-02-11 7:25 ` Uros Bizjak
2019-02-11 12:27 ` H.J. Lu
2019-02-11 12:51 ` Uros Bizjak
2019-02-11 13:12 ` H.J. Lu
2019-02-10 0:20 ` [PATCH 09/43] i386: Emulate MMX <any_logic><mode>3 " H.J. Lu
2019-02-10 0:20 ` [PATCH 18/43] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin " H.J. Lu
2019-02-10 11:36 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 07/43] i386: Emulate MMX mmx_pmaddwd " H.J. Lu
2019-02-10 10:21 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 19/43] i386: Emulate MMX mmx_pmovmskb " H.J. Lu
2019-02-10 12:11 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 27/43] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 " H.J. Lu
2019-02-10 12:23 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 35/43] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 12:34 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 20/43] i386: Emulate MMX mmx_umulv4hi3_highpart with SSE H.J. Lu
2019-02-10 12:12 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 42/43] i386: Implement V2SF <-> V2SI conversions " H.J. Lu
2019-02-10 0:20 ` [PATCH 10/43] i386: Emulate MMX mmx_andnot<mode>3 " H.J. Lu
2019-02-10 0:20 ` [PATCH 14/43] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi " H.J. Lu
2019-02-10 10:48 ` Uros Bizjak
2019-02-11 19:08 ` H.J. Lu
2019-02-11 19:52 ` Uros Bizjak
2019-02-10 0:20 ` [PATCH 36/43] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 0:20 ` [PATCH 33/43] i386: Emulate MMX ssse3_palignrdi with SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 25/43] i386: Emulate MMX movntq with SSE2 movntidi H.J. Lu
2019-02-10 0:23 ` [PATCH 32/43] i386: Emulate MMX ssse3_psign<mode>3 with SSE H.J. Lu
2019-02-10 12:29 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 41/43] i386: Implement V2SF add/sub/mul " H.J. Lu
2019-02-10 12:42 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 17/43] i386: Emulate MMX mmx_pinsrw " H.J. Lu
2019-02-10 11:44 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 21/43] i386: Emulate MMX maskmovq with SSE2 maskmovdqu H.J. Lu
2019-02-10 0:23 ` [PATCH 24/43] i386: Emulate MMX mmx_psadbw with SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 40/43] i386: Enable 8-byte vectorizer for TARGET_MMX_WITH_SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 23/43] i386: Emulate MMX mmx_uavgv4hi3 with SSE H.J. Lu
2019-02-10 0:23 ` [PATCH 26/43] i386: Emulate MMX umulv1siv1di3 with SSE2 H.J. Lu
2019-02-10 12:17 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 16/43] i386: Emulate MMX mmx_pextrw with SSE H.J. Lu
2019-02-10 11:20 ` Uros Bizjak
2019-02-10 0:23 ` [PATCH 37/43] i386: Allow MMX intrinsic emulation " H.J. Lu
2019-02-10 0:23 ` H.J. Lu [this message]
2019-02-10 12:19 ` [PATCH 22/43] i386: Emulate MMX mmx_uavgv8qi3 " Uros Bizjak
2019-02-10 0:23 ` [PATCH 29/43] i386: Emulate MMX ssse3_pmaddubsw " H.J. Lu
2019-02-10 12:26 ` Uros Bizjak
2019-02-10 0:24 ` [PATCH 38/43] i386: Add tests for MMX intrinsic emulations " H.J. Lu
2019-02-10 0:24 ` [PATCH 30/43] i386: Emulate MMX ssse3_pmulhrswv4hi3 " H.J. Lu
2019-02-10 12:27 ` Uros Bizjak
2019-02-10 0:24 ` [PATCH 39/43] i386: Also enable SSSE3 __m64 tests in 64-bit mode H.J. Lu
2019-02-10 0:24 ` [PATCH 31/43] i386: Emulate MMX pshufb with SSE version H.J. Lu
-- strict thread matches above, loose matches on Subject: below --
2019-02-09 13:24 [PATCH 00/43] V2: Emulate MMX intrinsics with SSE H.J. Lu
2019-02-09 13:25 ` [PATCH 22/43] i386: Emulate MMX mmx_uavgv8qi3 " H.J. Lu
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