From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3893 invoked by alias); 14 Feb 2019 12:31:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 3382 invoked by uid 89); 14 Feb 2019 12:30:53 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=HContent-Transfer-Encoding:8bit X-HELO: mail-pg1-f170.google.com Received: from mail-pg1-f170.google.com (HELO mail-pg1-f170.google.com) (209.85.215.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 14 Feb 2019 12:30:50 +0000 Received: by mail-pg1-f170.google.com with SMTP id q206so3018625pgq.4 for ; Thu, 14 Feb 2019 04:30:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hTwKd2MR+7ikHIZjq/O+EVJhWZNpDZhrEBEERuX38oM=; b=OW8946jjl5pHTkcE7SJgEiDL1vZ3W+SCMrM4JDW47HciVaLeZx3F6cX2N3GZKCG9rG kSnthkTrYODJYbY7wTtwWyztVonUjKEqxOoTr7Uq7ZFHnn6GABbPe6JmTMqXvCMpvHyQ MUwC2mvBoOGN5fvSrjAYQZK7g7yfGRVjdxB+tMYuhj28nvIyZkxztn1h6Tl5Y08ARYA1 32Jx9H65vf+ufKFN6t68rAPtN4TVxZwP9kdS4rZ/SMyOZtgUofLHpreTJCxjxaP4gJuF gBVbDybuxZiFFyoOt1PX4Jk3yYXCiI40wQFcbfcyP/bubfaWqlJKZslPctoBA4BHP4nX gPUQ== Return-Path: Received: from gnu-cfl-2.localdomain (c-73-93-86-59.hsd1.ca.comcast.net. [73.93.86.59]) by smtp.gmail.com with ESMTPSA id r130sm7051307pfr.48.2019.02.14.04.30.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Feb 2019 04:30:45 -0800 (PST) Received: from gnu-cfl-2.hsd1.ca.comcast.net (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 54EACC0351; Thu, 14 Feb 2019 04:30:33 -0800 (PST) From: "H.J. Lu" To: gcc-patches@gcc.gnu.org Cc: Uros Bizjak Subject: [PATCH 20/40] i386: Emulate MMX mmx_umulv4hi3_highpart with SSE Date: Thu, 14 Feb 2019 12:31:00 -0000 Message-Id: <20190214123031.13301-21-hjl.tools@gmail.com> In-Reply-To: <20190214123031.13301-1-hjl.tools@gmail.com> References: <20190214123031.13301-1-hjl.tools@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-IsSubscribed: yes X-SW-Source: 2019-02/txt/msg01028.txt.bz2 Emulate MMX mmx_umulv4hi3_highpart with SSE. Only SSE register source operand is allowed. PR target/89021 * config/i386/mmx.md (mmx_umulv4hi3_highpart): Also check TARGET_MMX and TARGET_MMX_WITH_SSE. (*mmx_umulv4hi3_highpart): Add SSE emulation. --- gcc/config/i386/mmx.md | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 9ff0db9c2ed..1fdd09242af 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -785,24 +785,30 @@ (zero_extend:V4SI (match_operand:V4HI 2 "nonimmediate_operand"))) (const_int 16))))] - "TARGET_SSE || TARGET_3DNOW_A" + "(TARGET_MMX || TARGET_MMX_WITH_SSE) + && (TARGET_SSE || TARGET_3DNOW_A)" "ix86_fixup_binary_operands_no_copy (MULT, V4HImode, operands);") (define_insn "*mmx_umulv4hi3_highpart" - [(set (match_operand:V4HI 0 "register_operand" "=y") + [(set (match_operand:V4HI 0 "register_operand" "=y,x,Yv") (truncate:V4HI (lshiftrt:V4SI (mult:V4SI (zero_extend:V4SI - (match_operand:V4HI 1 "nonimmediate_operand" "%0")) + (match_operand:V4HI 1 "nonimmediate_operand" "%0,0,Yv")) (zero_extend:V4SI - (match_operand:V4HI 2 "nonimmediate_operand" "ym"))) + (match_operand:V4HI 2 "nonimmediate_operand" "ym,x,Yv"))) (const_int 16))))] - "(TARGET_SSE || TARGET_3DNOW_A) + "(TARGET_MMX || TARGET_MMX_WITH_SSE) + && (TARGET_SSE || TARGET_3DNOW_A) && ix86_binary_operator_ok (MULT, V4HImode, operands)" - "pmulhuw\t{%2, %0|%0, %2}" - [(set_attr "type" "mmxmul") - (set_attr "mode" "DI")]) + "@ + pmulhuw\t{%2, %0|%0, %2} + pmulhuw\t{%2, %0|%0, %2} + vpmulhuw\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "mmx_isa" "native,x64_noavx,x64_avx") + (set_attr "type" "mmxmul,ssemul,ssemul") + (set_attr "mode" "DI,TI,TI")]) (define_expand "mmx_pmaddwd" [(set (match_operand:V2SI 0 "register_operand") -- 2.20.1