From: "H.J. Lu" <hjl.tools@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: Uros Bizjak <ubizjak@gmail.com>
Subject: [PATCH 35/42] i386: Emulate MMX abs<mode>2 with SSE
Date: Sat, 16 Feb 2019 00:43:00 -0000 [thread overview]
Message-ID: <20190216003408.23761-36-hjl.tools@gmail.com> (raw)
In-Reply-To: <20190216003408.23761-1-hjl.tools@gmail.com>
Emulate MMX abs<mode>2 with SSE. Only SSE register source operand is
allowed.
PR target/89021
* config/i386/sse.md (abs<mode>2): Add SSE emulation.
---
gcc/config/i386/sse.md | 15 +++++++++------
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index ec68b5dc2ce..92f5ad17156 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15942,16 +15942,19 @@
})
(define_insn "abs<mode>2"
- [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
+ [(set (match_operand:MMXMODEI 0 "register_operand" "=y,Yv")
(abs:MMXMODEI
- (match_operand:MMXMODEI 1 "nonimmediate_operand" "ym")))]
- "TARGET_SSSE3"
- "pabs<mmxvecsize>\t{%1, %0|%0, %1}";
- [(set_attr "type" "sselog1")
+ (match_operand:MMXMODEI 1 "register_mmxmem_operand" "ym,Yv")))]
+ "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSSE3"
+ "@
+ pabs<mmxvecsize>\t{%1, %0|%0, %1}
+ %vpabs<mmxvecsize>\t{%1, %0|%0, %1}"
+ [(set_attr "mmx_isa" "native,x64")
+ (set_attr "type" "sselog1")
(set_attr "prefix_rep" "0")
(set_attr "prefix_extra" "1")
(set (attr "prefix_rex") (symbol_ref "x86_extended_reg_mentioned_p (insn)"))
- (set_attr "mode" "DI")])
+ (set_attr "mode" "DI,TI")])
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
--
2.20.1
next prev parent reply other threads:[~2019-02-16 0:43 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-16 0:34 [PATCH 00/42] V7: Emulate MMX intrinsics " H.J. Lu
2019-02-16 0:34 ` [PATCH 10/42] i386: Emulate MMX mmx_andnot<mode>3 " H.J. Lu
2019-02-16 0:34 ` [PATCH 02/42] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 H.J. Lu
2019-02-16 0:34 ` [PATCH 33/42] i386: Emulate MMX ssse3_psign<mode>3 with SSE H.J. Lu
2019-02-16 0:34 ` [PATCH 01/42] i386: Allow MMX register modes in SSE registers H.J. Lu
2019-02-16 0:34 ` [PATCH 14/42] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi with SSE H.J. Lu
2019-02-16 0:34 ` [PATCH 11/42] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 " H.J. Lu
2019-02-16 0:34 ` [PATCH 34/42] i386: Emulate MMX ssse3_palignrdi " H.J. Lu
2019-02-16 0:34 ` [PATCH 16/42] i386: Emulate MMX mmx_pextrw " H.J. Lu
2019-02-16 0:34 ` [PATCH 18/42] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin " H.J. Lu
2019-02-16 0:34 ` [PATCH 20/42] i386: Emulate MMX mmx_umulv4hi3_highpart " H.J. Lu
2019-02-16 0:34 ` [PATCH 03/42] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX H.J. Lu
2019-02-16 0:34 ` [PATCH 04/42] i386: Emulate MMX plusminus/sat_plusminus with SSE H.J. Lu
2019-02-16 0:34 ` [PATCH 09/42] i386: Emulate MMX <any_logic><mode>3 " H.J. Lu
2019-02-16 0:34 ` [PATCH 17/42] i386: Emulate MMX mmx_pinsrw " H.J. Lu
2019-02-16 9:08 ` Uros Bizjak
2019-02-16 14:57 ` H.J. Lu
2019-02-16 0:34 ` [PATCH 29/42] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 " H.J. Lu
2019-02-16 0:34 ` [PATCH 15/42] i386: Emulate MMX sse_cvtpi2ps " H.J. Lu
2019-02-16 0:34 ` [PATCH 36/42] i386: Correct <ssse3_avx2>_pmulhrsw<mode>3[_mask] H.J. Lu
2019-02-16 9:28 ` Uros Bizjak
2019-02-16 0:34 ` [PATCH 06/42] i386: Emulate MMX smulv4hi3_highpart with SSE H.J. Lu
2019-02-16 0:34 ` [PATCH 13/42] i386: Emulate MMX pshufw " H.J. Lu
2019-02-16 0:34 ` [PATCH 08/42] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
2019-02-16 0:34 ` [PATCH 23/42] i386: Emulate MMX mmx_uavgv4hi3 " H.J. Lu
2019-02-16 0:35 ` [PATCH 30/42] i386: Emulate MMX ssse3_pmaddubsw " H.J. Lu
2019-02-16 0:35 ` [PATCH 07/42] i386: Emulate MMX mmx_pmaddwd " H.J. Lu
2019-02-16 0:35 ` [PATCH 42/42] i386: Add tests for MMX intrinsic emulations " H.J. Lu
2019-02-16 0:35 ` [PATCH 05/42] i386: Emulate MMX mulv4hi3 " H.J. Lu
2019-02-16 0:35 ` [PATCH 19/42] i386: Emulate MMX mmx_pmovmskb " H.J. Lu
2019-02-16 0:43 ` [PATCH 26/42] i386: Emulate MMX umulv1siv1di3 with SSE2 H.J. Lu
2019-02-16 0:43 ` [PATCH 40/42] i386: Allow MMX intrinsic emulation with SSE H.J. Lu
2019-02-16 0:43 ` [PATCH 28/42] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 " H.J. Lu
2019-02-16 0:43 ` [PATCH 12/42] i386: Emulate MMX vec_dupv2si " H.J. Lu
2019-02-16 0:43 ` [PATCH 41/42] i386: Enable TM MMX intrinsics with SSE2 H.J. Lu
2019-02-16 0:43 ` [PATCH 21/42] i386: Emulate MMX maskmovq with SSE2 maskmovdqu H.J. Lu
2019-02-16 0:43 ` [PATCH 39/42] i386: Allow MMX vector expanders with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-16 9:50 ` Uros Bizjak
2019-02-16 0:43 ` H.J. Lu [this message]
2019-02-16 0:43 ` [PATCH 22/42] i386: Emulate MMX mmx_uavgv8qi3 with SSE H.J. Lu
2019-02-16 0:43 ` [PATCH 25/42] i386: Emulate MMX movntq with SSE2 movntidi H.J. Lu
2019-02-16 0:43 ` [PATCH 24/42] i386: Emulate MMX mmx_psadbw with SSE H.J. Lu
2019-02-16 0:43 ` [PATCH 27/42] i386: Make _mm_empty () as NOP when MMX is disabled H.J. Lu
2019-02-16 8:58 ` Uros Bizjak
2019-02-16 14:56 ` H.J. Lu
2019-02-16 19:02 ` Uros Bizjak
2019-02-16 0:43 ` [PATCH 32/42] i386: Emulate MMX pshufb with SSE version H.J. Lu
2019-02-16 0:43 ` [PATCH 38/42] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-16 0:43 ` [PATCH 37/42] Prevent allocation of MMX registers " H.J. Lu
2019-02-16 0:43 ` [PATCH 31/42] i386: Emulate MMX ssse3_pmulhrswv4hi3 with SSE H.J. Lu
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