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From: "H.J. Lu" <hjl.tools@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: Uros Bizjak <ubizjak@gmail.com>
Subject: [PATCH 26/41] i386: Emulate MMX umulv1siv1di3 with SSE2
Date: Mon, 18 Feb 2019 18:44:00 -0000	[thread overview]
Message-ID: <20190218183657.16296-27-hjl.tools@gmail.com> (raw)
In-Reply-To: <20190218183657.16296-1-hjl.tools@gmail.com>

Emulate MMX umulv1siv1di3 with SSE2.  Only SSE register source operand
is allowed.

	PR target/89021
	* config/i386/mmx.md (sse2_umulv1siv1di3): Add SSE emulation
	support.
	(*sse2_umulv1siv1di3): Add SSE2 emulation.
---
 gcc/config/i386/mmx.md | 26 ++++++++++++++++----------
 1 file changed, 16 insertions(+), 10 deletions(-)

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index b06f0af984a..f27513f7f2c 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -905,30 +905,36 @@
         (mult:V1DI
 	  (zero_extend:V1DI
 	    (vec_select:V1SI
-	      (match_operand:V2SI 1 "nonimmediate_operand")
+	      (match_operand:V2SI 1 "register_mmxmem_operand")
 	      (parallel [(const_int 0)])))
 	  (zero_extend:V1DI
 	    (vec_select:V1SI
-	      (match_operand:V2SI 2 "nonimmediate_operand")
+	      (match_operand:V2SI 2 "register_mmxmem_operand")
 	      (parallel [(const_int 0)])))))]
-  "TARGET_SSE2"
+  "(TARGET_MMX || TARGET_MMX_WITH_SSE) && TARGET_SSE2"
   "ix86_fixup_binary_operands_no_copy (MULT, V2SImode, operands);")
 
 (define_insn "*sse2_umulv1siv1di3"
-  [(set (match_operand:V1DI 0 "register_operand" "=y")
+  [(set (match_operand:V1DI 0 "register_operand" "=y,x,Yv")
         (mult:V1DI
 	  (zero_extend:V1DI
 	    (vec_select:V1SI
-	      (match_operand:V2SI 1 "nonimmediate_operand" "%0")
+	      (match_operand:V2SI 1 "register_mmxmem_operand" "%0,0,Yv")
 	      (parallel [(const_int 0)])))
 	  (zero_extend:V1DI
 	    (vec_select:V1SI
-	      (match_operand:V2SI 2 "nonimmediate_operand" "ym")
+	      (match_operand:V2SI 2 "register_mmxmem_operand" "ym,x,Yv")
 	      (parallel [(const_int 0)])))))]
-  "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V2SImode, operands)"
-  "pmuludq\t{%2, %0|%0, %2}"
-  [(set_attr "type" "mmxmul")
-   (set_attr "mode" "DI")])
+  "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+   && TARGET_SSE2
+   && ix86_binary_operator_ok (MULT, V2SImode, operands)"
+  "@
+   pmuludq\t{%2, %0|%0, %2}
+   pmuludq\t{%2, %0|%0, %2}
+   vpmuludq\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
+   (set_attr "type" "mmxmul,ssemul,ssemul")
+   (set_attr "mode" "DI,TI,TI")])
 
 (define_expand "mmx_<code>v4hi3"
   [(set (match_operand:V4HI 0 "register_operand")
-- 
2.20.1

  parent reply	other threads:[~2019-02-18 18:44 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-18 18:39 [PATCH 00/41] V9: Emulate MMX intrinsics with SSE H.J. Lu
2019-02-18 18:37 ` [PATCH 14/41] i386: Emulate MMX sse_cvtps2pi/sse_cvttps2pi " H.J. Lu
2019-02-18 18:37 ` [PATCH 01/41] i386: Allow MMX register modes in SSE registers H.J. Lu
2019-02-18 18:37 ` [PATCH 05/41] i386: Emulate MMX mulv4hi3 with SSE H.J. Lu
2019-02-18 18:37 ` [PATCH 13/41] i386: Emulate MMX pshufw " H.J. Lu
2019-02-18 18:37 ` [PATCH 04/41] i386: Emulate MMX plusminus/sat_plusminus " H.J. Lu
2019-02-18 18:37 ` [PATCH 07/41] i386: Emulate MMX mmx_pmaddwd " H.J. Lu
2019-02-18 18:37 ` [PATCH 09/41] i386: Emulate MMX <any_logic><mode>3 " H.J. Lu
2019-02-18 18:37 ` [PATCH 11/41] i386: Emulate MMX mmx_eq/mmx_gt<mode>3 " H.J. Lu
2019-02-18 18:37 ` [PATCH 19/41] i386: Emulate MMX mmx_pmovmskb " H.J. Lu
2019-02-18 18:37 ` [PATCH 27/41] i386: Make _mm_empty () as NOP without MMX H.J. Lu
2019-02-18 18:37 ` [PATCH 12/41] i386: Emulate MMX vec_dupv2si with SSE H.J. Lu
2019-02-18 18:37 ` [PATCH 31/41] i386: Emulate MMX ssse3_pmulhrswv4hi3 " H.J. Lu
2019-02-18 18:38 ` [PATCH 10/41] i386: Emulate MMX mmx_andnot<mode>3 " H.J. Lu
2019-02-18 18:38 ` [PATCH 03/41] i386: Emulate MMX punpcklXX/punpckhXX with SSE punpcklXX H.J. Lu
2019-02-18 18:38 ` [PATCH 02/41] i386: Emulate MMX packsswb/packssdw/packuswb with SSE2 H.J. Lu
2019-02-18 18:38 ` [PATCH 39/41] i386: Allow MMX intrinsic emulation with SSE H.J. Lu
2019-02-18 18:38 ` [PATCH 15/41] i386: Emulate MMX sse_cvtpi2ps " H.J. Lu
2019-02-18 18:39 ` [PATCH 16/41] i386: Emulate MMX mmx_pextrw " H.J. Lu
2019-02-18 18:39 ` [PATCH 06/41] i386: Emulate MMX smulv4hi3_highpart " H.J. Lu
2019-02-18 18:39 ` [PATCH 08/41] i386: Emulate MMX ashr<mode>3/<shift_insn><mode>3 " H.J. Lu
2019-02-18 18:44 ` [PATCH 35/41] i386: Emulate MMX abs<mode>2 " H.J. Lu
2019-02-18 18:44 ` [PATCH 34/41] i386: Emulate MMX ssse3_palignrdi " H.J. Lu
2019-02-18 18:44 ` [PATCH 41/41] i386: Add tests for MMX intrinsic emulations " H.J. Lu
2019-02-18 18:44 ` [PATCH 30/41] i386: Emulate MMX ssse3_pmaddubsw " H.J. Lu
2019-02-18 18:44 ` [PATCH 20/41] i386: Emulate MMX mmx_umulv4hi3_highpart " H.J. Lu
2019-02-18 18:44 ` [PATCH 32/41] i386: Emulate MMX pshufb with SSE version H.J. Lu
2019-02-18 18:44 ` [PATCH 37/41] i386: Allow MMXMODE moves with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-18 18:44 ` [PATCH 38/41] i386: Allow MMX vector expanders " H.J. Lu
2019-02-18 18:44 ` H.J. Lu [this message]
2019-02-18 18:44 ` [PATCH 22/41] i386: Emulate MMX mmx_uavgv8qi3 with SSE H.J. Lu
2019-02-18 18:44 ` [PATCH 17/41] i386: Emulate MMX mmx_pinsrw " H.J. Lu
2019-02-18 18:44 ` [PATCH 21/41] i386: Emulate MMX maskmovq with SSE2 maskmovdqu H.J. Lu
2019-02-18 18:44 ` [PATCH 33/41] i386: Emulate MMX ssse3_psign<mode>3 with SSE H.J. Lu
2019-02-18 18:44 ` [PATCH 24/41] i386: Emulate MMX mmx_psadbw " H.J. Lu
2019-02-18 18:44 ` [PATCH 40/41] i386: Enable TM MMX intrinsics with SSE2 H.J. Lu
2019-02-18 18:44 ` [PATCH 25/41] i386: Emulate MMX movntq with SSE2 movntidi H.J. Lu
2019-02-18 18:44 ` [PATCH 18/41] i386: Emulate MMX V4HI smaxmin/V8QI umaxmin with SSE H.J. Lu
2019-02-18 18:44 ` [PATCH 36/41] Prevent allocation of MMX registers with TARGET_MMX_WITH_SSE H.J. Lu
2019-02-18 18:54 ` [PATCH 29/41] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE H.J. Lu
2019-02-18 18:54 ` [PATCH 23/41] i386: Emulate MMX mmx_uavgv4hi3 " H.J. Lu
2019-02-18 18:54 ` [PATCH 28/41] i386: Emulate MMX ssse3_ph<plusminus_mnemonic>wv4hi3 " H.J. Lu
2019-02-19 10:12 ` [PATCH 00/41] V9: Emulate MMX intrinsics " Uros Bizjak
  -- strict thread matches above, loose matches on Subject: below --
2019-02-16 22:41 [PATCH 00/41] V8: " H.J. Lu
2019-02-16 22:47 ` [PATCH 26/41] i386: Emulate MMX umulv1siv1di3 with SSE2 H.J. Lu

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