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From: Segher Boessenkool <segher@kernel.crashing.org>
To: "Kewen.Lin" <linkw@linux.ibm.com>
Cc: Li Jia He <helijia@linux.ibm.com>,
	gcc-patches@gcc.gnu.org,        wschmidt@linux.ibm.com
Subject: Re: [PATCH] [RS6000] Change maddld match_operand from DI to GPR
Date: Mon, 24 Jun 2019 07:19:00 -0000	[thread overview]
Message-ID: <20190624071945.GB7313@gate.crashing.org> (raw)
In-Reply-To: <554458e6-9519-e2cb-9747-b424bb275534@linux.ibm.com>

On Mon, Jun 24, 2019 at 02:45:09PM +0800, Kewen.Lin wrote:
> on 2019/6/24 下午2:00, Li Jia He wrote:
> > -#define TARGET_MADDLD	(TARGET_MODULO && TARGET_POWERPC64)
> > +#define TARGET_MADDLD	TARGET_MODULO
> 
> IMHO, I don't think this removal of TARGET_POWERPC64 is reasonable.
> As ISA V3.0, the description of this insn maddld is:
> GPR[RT].dword[0] ← Chop(result, 64)
> 
> It assumes the GPR has dword, it's a 64-bit specific insn, right?
> Your change relaxes it to be adopted on 32-bit.
> Although it's fine for powerpc LE since it's always 64-bit, it will
> have problems for power9 32bit like AIX?

Hi Kewen,

Newer ISAs require 64-bit to be implemented.  There are no optional
64-bit categories anymore.  Since this instruction is enabled for P9
(ISA 3.0) only (that's the TARGET_MODULO), it's fine.

What you are saying is quite true for older CPUs/ISAs though: there you
have to make sure you are targetting a CPU that supports the 64-bit
categories, before using any 64-bit insns.

But those days are gone :-)


Segher

  reply	other threads:[~2019-06-24  7:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-24  6:00 Li Jia He
2019-06-24  6:45 ` Kewen.Lin
2019-06-24  7:19   ` Segher Boessenkool [this message]
2019-06-24  7:43     ` Kewen.Lin
2019-06-24  7:49       ` Kewen.Lin
2019-06-24  8:16         ` Segher Boessenkool
2019-06-24  8:02       ` Segher Boessenkool
2019-06-24  8:10         ` Kewen.Lin
2019-06-24  7:39 ` Segher Boessenkool
2019-06-26  5:07   ` Li Jia He

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