From: Claudiu Zissulescu <claziss@gmail.com>
To: gcc-patches@gcc.gnu.org
Cc: fbedard@synopsys.com, andrew.burgess@embecosm.com, claziss@synopsys.com
Subject: [PATCH 1/3] [ARC] Cleanup sign/zero extend patterns
Date: Tue, 22 Oct 2019 08:22:00 -0000 [thread overview]
Message-ID: <20191022082154.16355-2-claziss@gmail.com> (raw)
In-Reply-To: <20191022082154.16355-1-claziss@gmail.com>
Cleanup sign/zero extend patterns (corrects the asm output string and constraint letters).
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md (zero_extendqihi2_i): Cleanup pattern.
(zero_extendqisi2_ac): Likewise.
(zero_extendhisi2_i): Likewise.
(extendqihi2_i): Likewise.
(extendqisi2_ac): Likewise.
(extendhisi2_i): Likewise.
---
gcc/config/arc/arc.md | 105 ++++++++++++++++++++++--------------------
1 file changed, 56 insertions(+), 49 deletions(-)
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index e1ecf7d3c73..e08aaf8f09a 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1838,18 +1838,22 @@ archs4x, archs4xd"
[(set_attr "type" "cmove,cmove")
(set_attr "length" "8,16")])
+;; -------------------------------------------------------------------
+;; Sign/Zero extension
+;; -------------------------------------------------------------------
(define_insn "*zero_extendqihi2_i"
- [(set (match_operand:HI 0 "dest_reg_operand" "=Rcq,Rcq#q,Rcw,w,r,r")
- (zero_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,Ucm,m")))]
+ [(set (match_operand:HI 0 "dest_reg_operand" "=q,q,r,r,r,r")
+ (zero_extend:HI
+ (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,Ucm,m")))]
""
"@
- extb%? %0,%1%&
- extb%? %0,%1%&
- bmsk%? %0,%1,7
- extb %0,%1
- xldb%U1 %0,%1
- ldb%U1 %0,%1"
+ extb%?\\t%0,%1
+ extb%?\\t%0,%1
+ bmsk%?\\t%0,%1,7
+ extb\\t%0,%1
+ xldb%U1\\t%0,%1
+ ldb%U1\\t%0,%1"
[(set_attr "type" "unary,unary,unary,unary,load,load")
(set_attr "iscompact" "maybe,true,false,false,false,false")
(set_attr "predicable" "no,no,yes,no,no,no")])
@@ -1862,18 +1866,19 @@ archs4x, archs4xd"
)
(define_insn "*zero_extendqisi2_ac"
- [(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,Rcq#q,Rcw,w,qRcq,!*x,r,r")
- (zero_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "0,Rcq#q,0,c,T,Usd,Ucm,m")))]
+ [(set (match_operand:SI 0 "dest_reg_operand" "=q,q,r,r,q,!*x,r,r")
+ (zero_extend:SI
+ (match_operand:QI 1 "nonvol_nonimm_operand" "0,q,0,r,T,Usd,Ucm,m")))]
""
"@
- extb%? %0,%1%&
- extb%? %0,%1%&
- bmsk%? %0,%1,7
- extb %0,%1
- ldb%? %0,%1%&
- ldb%? %0,%1%&
- xldb%U1 %0,%1
- ldb%U1 %0,%1"
+ extb%?\\t%0,%1
+ extb%?\\t%0,%1
+ bmsk%?\\t%0,%1,7
+ extb\\t%0,%1
+ ldb%?\\t%0,%1
+ ldb%?\\t%0,%1
+ xldb%U1\\t%0,%1
+ ldb%U1\\t%0,%1"
[(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
(set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
(set_attr "predicable" "no,no,yes,no,no,no,no,no")])
@@ -1886,23 +1891,23 @@ archs4x, archs4xd"
)
(define_insn "*zero_extendhisi2_i"
- [(set (match_operand:SI 0 "dest_reg_operand" "=Rcq,q,Rcw,w,!x,Rcqq,r,r")
- (zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,c,Usd,T,Ucm,m")))]
+ [(set (match_operand:SI 0 "dest_reg_operand" "=q,q,r,r,!x,q,r,r")
+ (zero_extend:SI
+ (match_operand:HI 1 "nonvol_nonimm_operand" "0,q,0,r,Usd,T,Ucm,m")))]
""
"@
- ext%_%? %0,%1%&
- ext%_%? %0,%1%&
- bmsk%? %0,%1,15
- ext%_ %0,%1
- ld%_%? %0,%1
- ld%_%? %0,%1
- * return TARGET_EM ? \"xldh%U1%V1 %0,%1\" : \"xldw%U1 %0,%1\";
- ld%_%U1%V1 %0,%1"
+ ext%_%?\\t%0,%1
+ ext%_%?\\t%0,%1
+ bmsk%?\\t%0,%1,15
+ ext%_\\t%0,%1
+ ld%_%?\\t%0,%1
+ ld%_%?\\t%0,%1
+ xldw%U1\\t%0,%1
+ ld%_%U1%V1\\t%0,%1"
[(set_attr "type" "unary,unary,unary,unary,load,load,load,load")
(set_attr "iscompact" "maybe,true,false,false,true,true,false,false")
(set_attr "predicable" "no,no,yes,no,no,no,no,no")])
-
(define_expand "zero_extendhisi2"
[(set (match_operand:SI 0 "dest_reg_operand" "")
(zero_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "")))]
@@ -1913,19 +1918,19 @@ archs4x, archs4xd"
;; Sign extension instructions.
(define_insn "*extendqihi2_i"
- [(set (match_operand:HI 0 "dest_reg_operand" "=Rcqq,r,r,r")
- (sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,r,Uex,m")))]
+ [(set (match_operand:HI 0 "dest_reg_operand" "=q,r,r,r")
+ (sign_extend:HI
+ (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))]
""
"@
- sexb%? %0,%1%&
- sexb %0,%1
- ldb.x%U1 %0,%1
- ldb.x%U1 %0,%1"
+ sexb%?\\t%0,%1
+ sexb\\t%0,%1
+ ldb.x%U1\\t%0,%1
+ ldb.x%U1\\t%0,%1"
[(set_attr "type" "unary,unary,load,load")
(set_attr "iscompact" "true,false,false,false")
(set_attr "length" "*,*,*,8")])
-
(define_expand "extendqihi2"
[(set (match_operand:HI 0 "dest_reg_operand" "")
(sign_extend:HI (match_operand:QI 1 "nonvol_nonimm_operand" "")))]
@@ -1934,14 +1939,15 @@ archs4x, archs4xd"
)
(define_insn "*extendqisi2_ac"
- [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,r,r")
- (sign_extend:SI (match_operand:QI 1 "nonvol_nonimm_operand" "Rcqq,c,Uex,m")))]
+ [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,r,r")
+ (sign_extend:SI
+ (match_operand:QI 1 "nonvol_nonimm_operand" "q,r,Uex,m")))]
""
"@
- sexb%? %0,%1%&
- sexb %0,%1
- ldb.x%U1 %0,%1
- ldb.x%U1 %0,%1"
+ sexb%?\\t%0,%1
+ sexb\\t%0,%1
+ ldb.x%U1\\t%0,%1
+ ldb.x%U1\\t%0,%1"
[(set_attr "type" "unary,unary,load,load")
(set_attr "iscompact" "true,false,false,false")
(set_attr "length" "*,*,*,8")])
@@ -1954,15 +1960,16 @@ archs4x, archs4xd"
)
(define_insn "*extendhisi2_i"
- [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w,Rcqq,r,r")
- (sign_extend:SI (match_operand:HI 1 "nonvol_nonimm_operand" "Rcqq,c,Ucd,Uex,m")))]
+ [(set (match_operand:SI 0 "dest_reg_operand" "=q,r,q,r,r")
+ (sign_extend:SI
+ (match_operand:HI 1 "nonvol_nonimm_operand" "q,r,Ucd,Uex,m")))]
""
"@
- sex%_%? %0,%1%&
- sex%_ %0,%1
- ldh%?.x %0,%1%&
- ld%_.x%U1%V1 %0,%1
- ld%_.x%U1%V1 %0,%1"
+ sex%_%?\\t%0,%1
+ sex%_\\t%0,%1
+ ldh%?.x\\t%0,%1%&
+ ld%_.x%U1%V1\\t%0,%1
+ ld%_.x%U1%V1\\t%0,%1"
[(set_attr "type" "unary,unary,load,load,load")
(set_attr "iscompact" "true,false,true,false,false")
(set_attr "length" "*,*,*,4,8")])
--
2.21.0
next prev parent reply other threads:[~2019-10-22 8:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-22 8:22 [PATCH 0/3][ARC] Bug fixes, cleanups and doc update Claudiu Zissulescu
2019-10-22 8:22 ` [PATCH 2/3] [ARC] Update mea option documentation Claudiu Zissulescu
2019-11-05 3:18 ` Jeff Law
2019-10-22 8:22 ` Claudiu Zissulescu [this message]
2019-11-05 3:17 ` [PATCH 1/3] [ARC] Cleanup sign/zero extend patterns Jeff Law
2019-10-22 9:36 ` [PATCH 3/3] [ARC] Don't split ior/mov predicated insns Claudiu Zissulescu
2019-11-05 3:20 ` Jeff Law
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