[PATCH 3/3] [ARC] Don't split ior/mov predicated insns.

[Claudiu Zissulescu <claziss@gmail.com>]

Do not split immediate constants for predicated instructions.

gcc/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_split_ior): Add asserts.
	(arc_split_mov_const): Likewise.
	(arc_check_ior_const): Do not match known short immediate values.
	* config/arc/arc.md (movsi): Don't split predicated instructions.
	(iorsi): Likewise.

testsuite/
xxxx-xx-xx  Claudiu Zissulescu  <claziss@synopsys.com>
	Sahahb Vahedi  <shahab@synopsys.com>
	Cupertino Miranda  <cmiranda@synopsys.com>

	* gcc.target/arc/or-cnst-size2.c: New test.
---
 gcc/config/arc/arc.c                         | 16 +++++++++++-----
 gcc/config/arc/arc.md                        | 13 ++++++++++---
 gcc/testsuite/gcc.target/arc/or-cnst-size2.c | 12 ++++++++++++
 3 files changed, 33 insertions(+), 8 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arc/or-cnst-size2.c

diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 9c4dee50494..fe5ee8f4104 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -11540,8 +11540,10 @@ arc_split_ior (rtx *operands)
       emit_insn (gen_rtx_SET (operands[0],
 			      gen_rtx_IOR (SImode, op1, GEN_INT (maskx))));
       break;
-    default:
+    case 0:
       break;
+    default:
+      gcc_unreachable ();
     }
 }
 
@@ -11551,6 +11553,10 @@ bool
 arc_check_ior_const (HOST_WIDE_INT ival)
 {
   unsigned int mask = (unsigned int) (ival & 0xffffffff);
+
+  if (UNSIGNED_INT6 (ival)
+      || IS_POWEROF2_P (mask))
+    return false;
   if (__builtin_popcount (mask) <= 3)
     return true;
   if (__builtin_popcount (mask & ~0x3f) <= 1)
@@ -11572,9 +11578,6 @@ arc_split_mov_const (rtx *operands)
   gcc_assert (CONST_INT_P (operands[1]));
   ival = INTVAL (operands[1]) & 0xffffffff;
 
-  if (SIGNED_INT12 (ival))
-    return false;
-
   /* 1. Check if we can just rotate limm by 8 but using ROR8.  */
   if (TARGET_BARREL_SHIFTER && TARGET_V2
       && ((ival & ~0x3f000000) == 0))
@@ -11641,7 +11644,7 @@ arc_split_mov_const (rtx *operands)
       return true;
     }
 
-  return false;
+  gcc_unreachable ();
 }
 
 /* Helper to check Cax constraint.  */
@@ -11651,6 +11654,9 @@ arc_check_mov_const (HOST_WIDE_INT ival)
 {
   ival = ival & 0xffffffff;
 
+  if (SIGNED_INT12 (ival))
+    return false;
+
   if ((ival & ~0x8000001f) == 0)
     return true;
 
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index e08aaf8f09a..d2b7a45b6e6 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -825,8 +825,11 @@ archs4x, archs4xd"
    st%U0%V0\\t%1,%0	;26
    st%U0%V0\\t%1,%0	;37
    st%U0%V0\\t%1,%0	;28"
-  "reload_completed && satisfies_constraint_Cax (operands[1])
-   && register_operand (operands[0], SImode)"
+  "reload_completed
+   && GET_CODE (PATTERN (insn)) != COND_EXEC
+   && register_operand (operands[0], SImode)
+   && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11)
+   && satisfies_constraint_Cax (operands[1])"
   [(const_int 0)]
   "
    arc_split_mov_const (operands);
@@ -3399,7 +3402,11 @@ archs4x, archs4xd"
    #
    or%?\\t%0,%1,%2
    or%?\\t%0,%1,%2"
-  "reload_completed && satisfies_constraint_C0x (operands[2])"
+  "reload_completed
+   && GET_CODE (PATTERN (insn)) != COND_EXEC
+   && register_operand (operands[0], SImode)
+   && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11)
+   && satisfies_constraint_C0x (operands[2])"
   [(const_int 0)]
   "
    arc_split_ior (operands);
diff --git a/gcc/testsuite/gcc.target/arc/or-cnst-size2.c b/gcc/testsuite/gcc.target/arc/or-cnst-size2.c
new file mode 100644
index 00000000000..33af97bbdbf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/or-cnst-size2.c
@@ -0,0 +1,12 @@
+/* Check if we optimize the immediate of a predicated instruction.  */
+/* { dg-options "-Os -fif-conversion -fif-conversion2" } */
+
+int a;
+int foo (void)
+{
+  if ((a & 60) == 0)
+    return a | 64;
+}
+
+/* { dg-final { scan-assembler "tst" } } */
+/* { dg-final { scan-assembler "bset.eq" } } */
-- 
2.21.0