From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 113765 invoked by alias); 22 Oct 2019 08:22:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 113699 invoked by uid 89); 22 Oct 2019 08:22:11 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.5 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.1 spammy=0xffffffff X-HELO: mail-wm1-f66.google.com Received: from mail-wm1-f66.google.com (HELO mail-wm1-f66.google.com) (209.85.128.66) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 22 Oct 2019 08:22:09 +0000 Received: by mail-wm1-f66.google.com with SMTP id r141so5634001wme.4 for ; Tue, 22 Oct 2019 01:22:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kbA1YC1AWaTj9WlYZjb6Vjz8f6V7+ATpYEXGCS04/o8=; b=qvhLZYqmgMBw29KhnHsL3YEgixtCht6prm7CgWkMakoISnF7/xuVaEDyB0SH+EUGU9 Qa4kPd1JW5SQVyGSWb5MCmKWJlmu1tpxXfUTeizRolRfbQNQsmp4zxD+WLBVvEfcoVqf zkj9/VLF83RXLC3FU/3ov6vIJKRdkCChStFspdcDbEYigoBr+rmK9q8reBeyvtnvyUv4 u6U8iyUy7Y7GpqUELZ0v79S1GdPX7NxwrHgQbewWWEYRqORfHf4S5gI5Q7wBO0oNQa/j E3yqE87NkyNIbK1HaansOxJMgFw+oGy/ZlJWa+7lhIr26YsGJKQxtUeFD+jCKN8mYzFq /5MQ== Return-Path: Received: from localhost.localdomain ([86.121.123.248]) by smtp.gmail.com with ESMTPSA id i18sm16458026wrx.14.2019.10.22.01.22.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2019 01:22:06 -0700 (PDT) From: Claudiu Zissulescu To: gcc-patches@gcc.gnu.org Cc: fbedard@synopsys.com, andrew.burgess@embecosm.com, claziss@synopsys.com Subject: [PATCH 3/3] [ARC] Don't split ior/mov predicated insns. Date: Tue, 22 Oct 2019 09:36:00 -0000 Message-Id: <20191022082154.16355-4-claziss@gmail.com> In-Reply-To: <20191022082154.16355-1-claziss@gmail.com> References: <20191022082154.16355-1-claziss@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-IsSubscribed: yes X-SW-Source: 2019-10/txt/msg01553.txt.bz2 Do not split immediate constants for predicated instructions. gcc/ xxxx-xx-xx Claudiu Zissulescu * config/arc/arc.c (arc_split_ior): Add asserts. (arc_split_mov_const): Likewise. (arc_check_ior_const): Do not match known short immediate values. * config/arc/arc.md (movsi): Don't split predicated instructions. (iorsi): Likewise. testsuite/ xxxx-xx-xx Claudiu Zissulescu Sahahb Vahedi Cupertino Miranda * gcc.target/arc/or-cnst-size2.c: New test. --- gcc/config/arc/arc.c | 16 +++++++++++----- gcc/config/arc/arc.md | 13 ++++++++++--- gcc/testsuite/gcc.target/arc/or-cnst-size2.c | 12 ++++++++++++ 3 files changed, 33 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arc/or-cnst-size2.c diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 9c4dee50494..fe5ee8f4104 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -11540,8 +11540,10 @@ arc_split_ior (rtx *operands) emit_insn (gen_rtx_SET (operands[0], gen_rtx_IOR (SImode, op1, GEN_INT (maskx)))); break; - default: + case 0: break; + default: + gcc_unreachable (); } } @@ -11551,6 +11553,10 @@ bool arc_check_ior_const (HOST_WIDE_INT ival) { unsigned int mask = (unsigned int) (ival & 0xffffffff); + + if (UNSIGNED_INT6 (ival) + || IS_POWEROF2_P (mask)) + return false; if (__builtin_popcount (mask) <= 3) return true; if (__builtin_popcount (mask & ~0x3f) <= 1) @@ -11572,9 +11578,6 @@ arc_split_mov_const (rtx *operands) gcc_assert (CONST_INT_P (operands[1])); ival = INTVAL (operands[1]) & 0xffffffff; - if (SIGNED_INT12 (ival)) - return false; - /* 1. Check if we can just rotate limm by 8 but using ROR8. */ if (TARGET_BARREL_SHIFTER && TARGET_V2 && ((ival & ~0x3f000000) == 0)) @@ -11641,7 +11644,7 @@ arc_split_mov_const (rtx *operands) return true; } - return false; + gcc_unreachable (); } /* Helper to check Cax constraint. */ @@ -11651,6 +11654,9 @@ arc_check_mov_const (HOST_WIDE_INT ival) { ival = ival & 0xffffffff; + if (SIGNED_INT12 (ival)) + return false; + if ((ival & ~0x8000001f) == 0) return true; diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index e08aaf8f09a..d2b7a45b6e6 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -825,8 +825,11 @@ archs4x, archs4xd" st%U0%V0\\t%1,%0 ;26 st%U0%V0\\t%1,%0 ;37 st%U0%V0\\t%1,%0 ;28" - "reload_completed && satisfies_constraint_Cax (operands[1]) - && register_operand (operands[0], SImode)" + "reload_completed + && GET_CODE (PATTERN (insn)) != COND_EXEC + && register_operand (operands[0], SImode) + && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11) + && satisfies_constraint_Cax (operands[1])" [(const_int 0)] " arc_split_mov_const (operands); @@ -3399,7 +3402,11 @@ archs4x, archs4xd" # or%?\\t%0,%1,%2 or%?\\t%0,%1,%2" - "reload_completed && satisfies_constraint_C0x (operands[2])" + "reload_completed + && GET_CODE (PATTERN (insn)) != COND_EXEC + && register_operand (operands[0], SImode) + && IN_RANGE (REGNO (operands[0]) ^ 4, 4, 11) + && satisfies_constraint_C0x (operands[2])" [(const_int 0)] " arc_split_ior (operands); diff --git a/gcc/testsuite/gcc.target/arc/or-cnst-size2.c b/gcc/testsuite/gcc.target/arc/or-cnst-size2.c new file mode 100644 index 00000000000..33af97bbdbf --- /dev/null +++ b/gcc/testsuite/gcc.target/arc/or-cnst-size2.c @@ -0,0 +1,12 @@ +/* Check if we optimize the immediate of a predicated instruction. */ +/* { dg-options "-Os -fif-conversion -fif-conversion2" } */ + +int a; +int foo (void) +{ + if ((a & 60) == 0) + return a | 64; +} + +/* { dg-final { scan-assembler "tst" } } */ +/* { dg-final { scan-assembler "bset.eq" } } */ -- 2.21.0