* [PATCH] Remove redudant iptr when operand already has a scalar mode.
@ 2019-10-26 14:06 Hongtao Liu
2019-10-26 18:16 ` Uros Bizjak
2019-10-28 22:06 ` [PATCH] Unbreak -masm=intel (PR target/92258) Jakub Jelinek
0 siblings, 2 replies; 4+ messages in thread
From: Hongtao Liu @ 2019-10-26 14:06 UTC (permalink / raw)
To: Uros Bizjak, GCC Patches
[-- Attachment #1: Type: text/plain, Size: 599 bytes --]
> BTW: Please also note that there is no need to use <iptr> or operand
> mode override in scalar insn templates for intel asm dialect when
> operand already has a scalar mode.
https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01868.html
This patch is to remove redundant <iptr> when operand already has a scalar mode.
bootstrap and regression test for i386/x86-64 is ok.
Changelog
gcc/
* config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
<sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
operand is already scalar mode.
(iptr): Remove SF/DF.
--
BR,
Hongtao
[-- Attachment #2: 0001-Remove-redudant-iptr-when-operand-is-already-scalar-.patch --]
[-- Type: application/octet-stream, Size: 1851 bytes --]
From 4620daa9aa11d67b6aca90d38234c5ce71c6f917 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao.liu@intel.com>
Date: Sat, 26 Oct 2019 10:54:54 +0800
Subject: [PATCH] Remove redudant <iptr> when operand is already scalar mode.
gcc/
* config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
<sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
operand is already scalar mode.
(iptr): Remove SF/DF.
---
gcc/config/i386/sse.md | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 403e91d4b17..231b8cf6e67 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -850,8 +850,7 @@
(V16QI "b") (V8HI "w") (V4SI "k") (V2DI "q")
(V16SF "k") (V8DF "q")
(V8SF "k") (V4DF "q")
- (V4SF "k") (V2DF "q")
- (SF "k") (DF "q")])
+ (V4SF "k") (V2DF "q")])
;; Mapping of vector modes to VPTERNLOG suffix
(define_mode_attr ternlogsuffix
@@ -1851,8 +1850,8 @@
(const_int 1)))]
"TARGET_SSE"
"@
- <plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %<iptr>2}
- v<plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %<iptr>2}"
+ <plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %2}
+ v<plusminus_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "sseadd")
(set_attr "prefix" "orig,vex")
@@ -1927,8 +1926,8 @@
(const_int 1)))]
"TARGET_SSE"
"@
- <multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %<iptr>2}
- v<multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %<iptr>2}"
+ <multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %0|%0, %2}
+ v<multdiv_mnemonic><ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "sse<multdiv_mnemonic>")
(set_attr "prefix" "orig,vex")
--
2.19.1
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] Remove redudant iptr when operand already has a scalar mode.
2019-10-26 14:06 [PATCH] Remove redudant iptr when operand already has a scalar mode Hongtao Liu
@ 2019-10-26 18:16 ` Uros Bizjak
2019-10-28 22:06 ` [PATCH] Unbreak -masm=intel (PR target/92258) Jakub Jelinek
1 sibling, 0 replies; 4+ messages in thread
From: Uros Bizjak @ 2019-10-26 18:16 UTC (permalink / raw)
To: Hongtao Liu; +Cc: GCC Patches
On Sat, Oct 26, 2019 at 3:27 PM Hongtao Liu <crazylht@gmail.com> wrote:
>
> > BTW: Please also note that there is no need to use <iptr> or operand
> > mode override in scalar insn templates for intel asm dialect when
> > operand already has a scalar mode.
> https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01868.html
>
> This patch is to remove redundant <iptr> when operand already has a scalar mode.
>
> bootstrap and regression test for i386/x86-64 is ok.
>
> Changelog
> gcc/
> * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
> <sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
> operand is already scalar mode.
> (iptr): Remove SF/DF.
OK.
Thanks,
Uros.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH] Unbreak -masm=intel (PR target/92258)
2019-10-26 14:06 [PATCH] Remove redudant iptr when operand already has a scalar mode Hongtao Liu
2019-10-26 18:16 ` Uros Bizjak
@ 2019-10-28 22:06 ` Jakub Jelinek
2019-10-28 22:08 ` Uros Bizjak
1 sibling, 1 reply; 4+ messages in thread
From: Jakub Jelinek @ 2019-10-28 22:06 UTC (permalink / raw)
To: Uros Bizjak, Hongtao Liu; +Cc: GCC Patches
Hi!
On Sat, Oct 26, 2019 at 09:27:12PM +0800, Hongtao Liu wrote:
> > BTW: Please also note that there is no need to use <iptr> or operand
> > mode override in scalar insn templates for intel asm dialect when
> > operand already has a scalar mode.
> https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01868.html
>
> This patch is to remove redundant <iptr> when operand already has a scalar mode.
>
> bootstrap and regression test for i386/x86-64 is ok.
>
> Changelog
> gcc/
> * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
> <sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
> operand is already scalar mode.
> (iptr): Remove SF/DF.
SF/DFmode in iptr certainly is not redundant, if you look at tmp-mddump.md
after this patch, there is <iptr> kept in all the sse.md:3140 patterns:
(define_insn "<sse>_<unord>comi<round_saeonly_name>"
[(set (reg:CCFP FLAGS_REG)
(compare:CCFP
(vec_select:MODEF
(match_operand:<ssevecmode> 0 "register_operand" "v")
(parallel [(const_int 0)]))
(vec_select:MODEF
(match_operand:<ssevecmode> 1 "<round_saeonly_nimm_scalar_predicate>" "<round_saeonly_constraint>")
(parallel [(const_int 0)]))))]
"SSE_FLOAT_MODE_P (<MODE>mode)"
"%v<unord>comi<ssemodesuffix>\t{<round_saeonly_op2>%1, %0|%0, %<iptr>1<round_saeonly_op2>}"
[(set_attr "type" "ssecomi")
(set_attr "prefix" "maybe_vex")
(set_attr "prefix_rep" "0")
(set (attr "prefix_data16")
(if_then_else (eq_attr "mode" "DF")
(const_string "1")
(const_string "0")))
(set_attr "mode" "<MODE>")])
While operands[1] has V2DFmode or V4SFmode and thus not a scalar mode,
we still want a q or k modifier on it, because that is what the instruction
actually reads.
The following patch reverts that part, ok for trunk if it passes
bootstrap/regtest?
2019-10-28 Jakub Jelinek <jakub@redhat.com>
PR target/92258
* config/i386/sse.md (iptr): Revert 2019-10-27 change.
* gcc.target/i386/pr92258.c: New test.
--- gcc/config/i386/sse.md.jj 2019-10-28 22:16:14.619007560 +0100
+++ gcc/config/i386/sse.md 2019-10-28 22:51:48.594746180 +0100
@@ -850,7 +850,8 @@ (define_mode_attr iptr
(V16QI "b") (V8HI "w") (V4SI "k") (V2DI "q")
(V16SF "k") (V8DF "q")
(V8SF "k") (V4DF "q")
- (V4SF "k") (V2DF "q")])
+ (V4SF "k") (V2DF "q")
+ (SF "k") (DF "q")])
;; Mapping of vector modes to VPTERNLOG suffix
(define_mode_attr ternlogsuffix
--- gcc/testsuite/gcc.target/i386/pr92258.c.jj 2019-10-28 22:52:44.093881178 +0100
+++ gcc/testsuite/gcc.target/i386/pr92258.c 2019-10-28 22:52:40.150942632 +0100
@@ -0,0 +1,11 @@
+/* PR target/92258 */
+/* { dg-do compile } */
+/* { dg-options "-masm=intel" } */
+
+typedef double V __attribute__ ((__vector_size__ (16)));
+
+int
+foo (V x, V y)
+{
+ return __builtin_ia32_ucomisdeq (x, y);
+}
Jakub
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] Unbreak -masm=intel (PR target/92258)
2019-10-28 22:06 ` [PATCH] Unbreak -masm=intel (PR target/92258) Jakub Jelinek
@ 2019-10-28 22:08 ` Uros Bizjak
0 siblings, 0 replies; 4+ messages in thread
From: Uros Bizjak @ 2019-10-28 22:08 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: Hongtao Liu, GCC Patches
On Mon, Oct 28, 2019 at 11:02 PM Jakub Jelinek <jakub@redhat.com> wrote:
>
> Hi!
>
> On Sat, Oct 26, 2019 at 09:27:12PM +0800, Hongtao Liu wrote:
> > > BTW: Please also note that there is no need to use <iptr> or operand
> > > mode override in scalar insn templates for intel asm dialect when
> > > operand already has a scalar mode.
> > https://gcc.gnu.org/ml/gcc-patches/2019-10/msg01868.html
> >
> > This patch is to remove redundant <iptr> when operand already has a scalar mode.
> >
> > bootstrap and regression test for i386/x86-64 is ok.
> >
> > Changelog
> > gcc/
> > * config/i386/sse.md (*<sse>_vm<plusminus_insn><mode>3,
> > <sse>_vm<multdiv_mnemonic><mode>3): Remove <iptr> since
> > operand is already scalar mode.
> > (iptr): Remove SF/DF.
>
> SF/DFmode in iptr certainly is not redundant, if you look at tmp-mddump.md
> after this patch, there is <iptr> kept in all the sse.md:3140 patterns:
> (define_insn "<sse>_<unord>comi<round_saeonly_name>"
> [(set (reg:CCFP FLAGS_REG)
> (compare:CCFP
> (vec_select:MODEF
> (match_operand:<ssevecmode> 0 "register_operand" "v")
> (parallel [(const_int 0)]))
> (vec_select:MODEF
> (match_operand:<ssevecmode> 1 "<round_saeonly_nimm_scalar_predicate>" "<round_saeonly_constraint>")
> (parallel [(const_int 0)]))))]
> "SSE_FLOAT_MODE_P (<MODE>mode)"
> "%v<unord>comi<ssemodesuffix>\t{<round_saeonly_op2>%1, %0|%0, %<iptr>1<round_saeonly_op2>}"
> [(set_attr "type" "ssecomi")
> (set_attr "prefix" "maybe_vex")
> (set_attr "prefix_rep" "0")
> (set (attr "prefix_data16")
> (if_then_else (eq_attr "mode" "DF")
> (const_string "1")
> (const_string "0")))
> (set_attr "mode" "<MODE>")])
> While operands[1] has V2DFmode or V4SFmode and thus not a scalar mode,
> we still want a q or k modifier on it, because that is what the instruction
> actually reads.
>
> The following patch reverts that part, ok for trunk if it passes
> bootstrap/regtest?
>
> 2019-10-28 Jakub Jelinek <jakub@redhat.com>
>
> PR target/92258
> * config/i386/sse.md (iptr): Revert 2019-10-27 change.
>
> * gcc.target/i386/pr92258.c: New test.
OK with a dg-options adjustment.
Thanks,
Uros.
>
> --- gcc/config/i386/sse.md.jj 2019-10-28 22:16:14.619007560 +0100
> +++ gcc/config/i386/sse.md 2019-10-28 22:51:48.594746180 +0100
> @@ -850,7 +850,8 @@ (define_mode_attr iptr
> (V16QI "b") (V8HI "w") (V4SI "k") (V2DI "q")
> (V16SF "k") (V8DF "q")
> (V8SF "k") (V4DF "q")
> - (V4SF "k") (V2DF "q")])
> + (V4SF "k") (V2DF "q")
> + (SF "k") (DF "q")])
>
> ;; Mapping of vector modes to VPTERNLOG suffix
> (define_mode_attr ternlogsuffix
> --- gcc/testsuite/gcc.target/i386/pr92258.c.jj 2019-10-28 22:52:44.093881178 +0100
> +++ gcc/testsuite/gcc.target/i386/pr92258.c 2019-10-28 22:52:40.150942632 +0100
> @@ -0,0 +1,11 @@
> +/* PR target/92258 */
> +/* { dg-do compile } */
> +/* { dg-options "-masm=intel" } */
-msse2 is also needed here for 32bit targets.
> +
> +typedef double V __attribute__ ((__vector_size__ (16)));
> +
> +int
> +foo (V x, V y)
> +{
> + return __builtin_ia32_ucomisdeq (x, y);
> +}
>
>
> Jakub
>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2019-10-26 14:06 [PATCH] Remove redudant iptr when operand already has a scalar mode Hongtao Liu
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