From: Hans-Peter Nilsson <hp@axis.com>
To: <gcc-patches@gcc.gnu.org>
Subject: [cris-decc0 1/14] cris: Emit trivial btstq expected by gcc.target/cris/sync-2i.c, sync-2c.c
Date: Wed, 12 Feb 2020 06:48:00 -0000 [thread overview]
Message-ID: <202002120648.01C6mEqB026246@ignucius.se.axis.com> (raw)
PR target/93372
* config/cris/cris.md (zcond): New code_iterator.
("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
As the added FIXME says, the new insn_and_split generates only a
small subset of the bit-tests that can be matched by "*btst" and
that were emitted by the undecc0rated cris.md at combine-time,
but it's naturally separable from a general variant by being
just what's needed for the test-cases that were previously
xfailed, and that no additional CCmodes are required.
---
gcc/config/cris/cris.md | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 7690d7f06..0b42197a9 100644
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -178,6 +178,7 @@ (define_code_iterator shiftrt [ashiftrt lshiftrt])
(define_code_attr shlr [(ashiftrt "ashr") (lshiftrt "lshr") (ashift "ashl")])
(define_code_attr slr [(ashiftrt "asr") (lshiftrt "lsr") (ashift "lsl")])
+(define_code_iterator zcond [eq ne])
(define_code_iterator ncond [eq ne gtu ltu geu leu])
(define_code_iterator ocond [gt le])
(define_code_iterator rcond [lt ge])
@@ -1934,6 +1935,32 @@ (define_insn_and_split "*cbranch<mode>4"
(pc)))]
"")
+;; FIXME: this matches only a subset of what the "*btst" pattern can handle.
+(define_insn_and_split "*cbranch<mode>4_btstq<CC>"
+ [(set (pc)
+ (if_then_else
+ (zcond
+ (zero_extract:BWD
+ (match_operand:BWD 0 "register_operand" "r")
+ (match_operand 1 "const_int_operand" "Kc")
+ (const_int 0))
+ (const_int 0))
+ (label_ref (match_operand 2 ""))
+ (pc)))
+ (clobber (reg:CC CRIS_CC0_REGNUM))]
+ ""
+ "#"
+ "&& reload_completed"
+ [(set (reg:CC CRIS_CC0_REGNUM)
+ (compare:CC
+ (zero_extract:SI (match_dup 0) (match_dup 1) (const_int 0))
+ (const_int 0)))
+ (set (pc)
+ (if_then_else (zcond (reg:CC CRIS_CC0_REGNUM) (const_int 0))
+ (label_ref (match_dup 3))
+ (pc)))]
+ "")
+
;; We suffer from the same overflow-bit-gets-in-the-way problem as
;; e.g. m68k, so we have to check if overflow bit is set on all "signed"
--
2.11.0
brgds, H-P
reply other threads:[~2020-02-12 6:48 UTC|newest]
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