From: Richard Henderson <richard.henderson@linaro.org>
To: gcc-patches@gcc.gnu.org
Cc: richard.earnshaw@arm.com, richard.sandiford@arm.com,
marcus.shawcroft@arm.com, kyrylo.tkachov@arm.com,
Wilco.Dijkstra@arm.com
Subject: [PATCH v2 9/9] aarch64: Implement absti2
Date: Fri, 20 Mar 2020 19:42:31 -0700 [thread overview]
Message-ID: <20200321024231.13778-10-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200321024231.13778-1-richard.henderson@linaro.org>
* config/aarch64/aarch64.md (absti2): New.
---
gcc/config/aarch64/aarch64.md | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 284a8038e28..7a112f89487 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3653,6 +3653,36 @@
}
)
+(define_expand "absti2"
+ [(match_operand:TI 0 "register_operand")
+ (match_operand:TI 1 "register_operand")]
+ ""
+ {
+ rtx lo_op1 = gen_lowpart (DImode, operands[1]);
+ rtx hi_op1 = gen_highpart (DImode, operands[1]);
+ rtx lo_tmp = gen_reg_rtx (DImode);
+ rtx hi_tmp = gen_reg_rtx (DImode);
+ rtx x;
+
+ emit_insn (gen_negdi_carryout (lo_tmp, lo_op1));
+ emit_insn (gen_negvdi_carryinV (hi_tmp, hi_op1));
+
+ rtx cc = gen_rtx_REG (CC_NZmode, CC_REGNUM);
+
+ x = gen_rtx_GE (VOIDmode, cc, const0_rtx);
+ x = gen_rtx_IF_THEN_ELSE (DImode, x, lo_tmp, lo_op1);
+ emit_insn (gen_rtx_SET (lo_tmp, x));
+
+ x = gen_rtx_GE (VOIDmode, cc, const0_rtx);
+ x = gen_rtx_IF_THEN_ELSE (DImode, x, hi_tmp, hi_op1);
+ emit_insn (gen_rtx_SET (hi_tmp, x));
+
+ emit_move_insn (gen_lowpart (DImode, operands[0]), lo_tmp);
+ emit_move_insn (gen_highpart (DImode, operands[0]), hi_tmp);
+ DONE;
+ }
+)
+
(define_insn "neg<mode>2"
[(set (match_operand:GPI 0 "register_operand" "=r,w")
(neg:GPI (match_operand:GPI 1 "register_operand" "r,w")))]
--
2.20.1
prev parent reply other threads:[~2020-03-21 2:42 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-21 2:42 [PATCH v2 0/9] aarch64: Implement TImode comparisons Richard Henderson
2020-03-21 2:42 ` [PATCH v2 1/9] aarch64: Accept 0 as first argument to compares Richard Henderson
2020-03-31 16:55 ` Richard Sandiford
2020-03-31 17:15 ` Richard Henderson
2020-03-21 2:42 ` [PATCH v2 2/9] aarch64: Accept zeros in add<GPI>3_carryin Richard Henderson
2020-03-21 2:42 ` [PATCH v2 3/9] aarch64: Add <su>cmp_*_carryinC patterns Richard Henderson
2020-03-22 19:30 ` Segher Boessenkool
2020-03-22 20:40 ` Richard Henderson
2020-03-31 18:34 ` Richard Sandiford
2020-03-31 22:44 ` Richard Henderson
2020-04-01 12:37 ` Segher Boessenkool
2020-04-01 16:28 ` Richard Sandiford
2020-04-01 17:14 ` Richard Henderson
2020-03-21 2:42 ` [PATCH v2 4/9] aarch64: Add <su>cmp<GPI>_carryinC_m2 Richard Henderson
2020-03-21 2:42 ` [PATCH v2 5/9] aarch64: Provide expander for sub<GPI>3_compare1 Richard Henderson
2020-03-21 2:42 ` [PATCH v2 6/9] aarch64: Introduce aarch64_expand_addsubti Richard Henderson
2020-03-21 2:42 ` [PATCH v2 7/9] aarch64: Adjust result of aarch64_gen_compare_reg Richard Henderson
2020-03-22 21:55 ` Segher Boessenkool
2020-03-22 22:21 ` Richard Henderson
2020-03-21 2:42 ` [PATCH v2 8/9] aarch64: Implement TImode comparisons Richard Henderson
2020-03-21 2:42 ` Richard Henderson [this message]
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