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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 26 Mar 2020 10:06:44 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 02QA6lp859834450 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 26 Mar 2020 10:06:47 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6957552057; Thu, 26 Mar 2020 10:06:47 +0000 (GMT) Received: from genoa.aus.stglabs.ibm.com (unknown [9.40.192.157]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 6329052054; Thu, 26 Mar 2020 10:06:46 +0000 (GMT) From: luoxhu@linux.ibm.com To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, wschmidt@linux.ibm.com, guojiufu@linux.ibm.com, linkw@gcc.gnu.org, Xionghu Luo Subject: [PATCH] rs6000: Don't split constant oprator when add, move to temp register for future optimization Date: Thu, 26 Mar 2020 05:06:43 -0500 X-Mailer: git-send-email 2.21.0.777.g83232e3864 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 x-cbid: 20032610-0016-0000-0000-000002F86BAA X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20032610-0017-0000-0000-0000335C13A5 Message-Id: <20200326100643.32487-1-luoxhu@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.645 definitions=2020-03-25_15:2020-03-24, 2020-03-25 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=1 spamscore=0 clxscore=1015 malwarescore=0 impostorscore=0 bulkscore=0 phishscore=0 mlxscore=0 adultscore=0 mlxlogscore=999 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2003260066 X-Spam-Status: No, score=-34.4 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_DMARC_STATUS, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Mar 2020 10:06:54 -0000 From: Xionghu Luo Remove split code from add3 to allow a later pass to split. This allows later logic to hoist out constant load in add instructions. In loop, lis+ori could be hoisted out to improve performance compared with previous addis+addi (About 15% on typical case), weak point is one more register is used and one more instruction is generated. i.e.: addis 3,3,0x8765 addi 3,3,0x4321 => lis 9,0x8765 ori 9,9,0x4321 add 3,3,9 gcc/ChangeLog: 2020-03-26 Xiong Hu Luo * config/rs6000/rs6000.md (add3): Remove split code, move constant to temp register before add. gcc/testsuite/ChangeLog: 2020-03-26 Xiong Hu Luo * gcc.target/powerpc/add-const.c: New. --- gcc/config/rs6000/rs6000.md | 25 ++------------------ gcc/testsuite/gcc.target/powerpc/add-const.c | 18 ++++++++++++++ 2 files changed, 20 insertions(+), 23 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/add-const.c diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index ad88b6783af..72f3f604e0d 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1733,29 +1733,8 @@ (define_expand "add3" || rtx_equal_p (operands[0], operands[1])) ? operands[0] : gen_reg_rtx (mode)); - /* Adding a constant to r0 is not a valid insn, so use a different - strategy in that case. */ - if (reg_or_subregno (operands[1]) == 0 || reg_or_subregno (tmp) == 0) - { - if (operands[0] == operands[1]) - FAIL; - rs6000_emit_move (operands[0], operands[2], mode); - emit_insn (gen_add3 (operands[0], operands[1], operands[0])); - DONE; - } - - HOST_WIDE_INT val = INTVAL (operands[2]); - HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; - HOST_WIDE_INT rest = trunc_int_for_mode (val - low, mode); - - if (mode == DImode && !satisfies_constraint_L (GEN_INT (rest))) - FAIL; - - /* The ordering here is important for the prolog expander. - When space is allocated from the stack, adding 'low' first may - produce a temporary deallocation (which would be bad). */ - emit_insn (gen_add3 (tmp, operands[1], GEN_INT (rest))); - emit_insn (gen_add3 (operands[0], tmp, GEN_INT (low))); + rs6000_emit_move (tmp, operands[2], mode); + emit_insn (gen_add3 (operands[0], operands[1], tmp)); DONE; } }) diff --git a/gcc/testsuite/gcc.target/powerpc/add-const.c b/gcc/testsuite/gcc.target/powerpc/add-const.c new file mode 100644 index 00000000000..e1007247b32 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/add-const.c @@ -0,0 +1,18 @@ +/* { dg-do compile { target { lp64 } } } */ +/* { dg-options "-O3 -fno-unroll-loops" } */ + +/* Ensure the lis,ori are generated, which indicates they have + been hoisted outside of the loop. */ + +typedef unsigned long ulong; +ulong +foo (ulong n, ulong h) +{ + int i; + for (i = 0; i < n; i++) + h = ((h + 8) | h) + 0x87654321; + return h; +} + +/* { dg-final { scan-assembler-times {\mlis\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mori\M} 1 } } */ -- 2.21.0.777.g83232e3864