From: Richard Henderson <richard.henderson@linaro.org>
To: gcc-patches@gcc.gnu.org
Cc: richard.sandiford@arm.com, segher@kernel.crashing.org,
richard.earnshaw@arm.com, Wilco.Dijkstra@arm.com,
marcus.shawcroft@arm.com, kyrylo.tkachov@arm.com
Subject: [PATCH v2 11/11] aarch64: Implement absti2
Date: Thu, 2 Apr 2020 11:53:53 -0700 [thread overview]
Message-ID: <20200402185353.11047-12-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200402185353.11047-1-richard.henderson@linaro.org>
* config/aarch64/aarch64.md (absti2): New.
---
gcc/config/aarch64/aarch64.md | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index cf716f815a1..4a30d4cca93 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3521,6 +3521,35 @@
}
)
+(define_expand "absti2"
+ [(match_operand:TI 0 "register_operand")
+ (match_operand:TI 1 "register_operand")]
+ ""
+ {
+ rtx lo_op1 = gen_lowpart (DImode, operands[1]);
+ rtx hi_op1 = gen_highpart (DImode, operands[1]);
+ rtx lo_tmp = gen_reg_rtx (DImode);
+ rtx hi_tmp = gen_reg_rtx (DImode);
+ rtx x, cc;
+
+ emit_insn (gen_negdi_carryout (lo_tmp, lo_op1));
+ emit_insn (gen_subdi3_carryin_cmp (hi_tmp, const0_rtx, hi_op1));
+
+ cc = gen_rtx_REG (CC_NZmode, CC_REGNUM);
+ x = gen_rtx_GE (VOIDmode, cc, const0_rtx);
+ x = gen_rtx_IF_THEN_ELSE (DImode, x, lo_tmp, lo_op1);
+ emit_insn (gen_rtx_SET (lo_tmp, x));
+
+ x = gen_rtx_GE (VOIDmode, cc, const0_rtx);
+ x = gen_rtx_IF_THEN_ELSE (DImode, x, hi_tmp, hi_op1);
+ emit_insn (gen_rtx_SET (hi_tmp, x));
+
+ emit_move_insn (gen_lowpart (DImode, operands[0]), lo_tmp);
+ emit_move_insn (gen_highpart (DImode, operands[0]), hi_tmp);
+ DONE;
+ }
+)
+
(define_insn "neg<mode>2"
[(set (match_operand:GPI 0 "register_operand" "=r,w")
(neg:GPI (match_operand:GPI 1 "register_operand" "r,w")))]
--
2.20.1
next prev parent reply other threads:[~2020-04-02 18:54 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-02 18:53 [PATCH v2 00/11] aarch64: Implement TImode comparisons Richard Henderson
2020-04-02 18:53 ` [PATCH v2 01/11] aarch64: Accept 0 as first argument to compares Richard Henderson
2020-04-02 18:53 ` [PATCH v2 02/11] aarch64: Accept zeros in add<GPI>3_carryin Richard Henderson
2020-04-02 18:53 ` [PATCH v2 03/11] aarch64: Provide expander for sub<GPI>3_compare1 Richard Henderson
2020-04-02 18:53 ` [PATCH v2 04/11] aarch64: Introduce aarch64_expand_addsubti Richard Henderson
2020-04-02 18:53 ` [PATCH v2 05/11] aarch64: Use UNSPEC_SBCS for subtract-with-borrow + output flags Richard Henderson
2020-04-09 21:52 ` Segher Boessenkool
2020-04-10 3:50 ` Richard Henderson
2020-04-02 18:53 ` [PATCH v2 06/11] aarch64: Use UNSPEC_ADCS for add-with-carry " Richard Henderson
2020-04-02 18:53 ` [PATCH v2 07/11] aarch64: Remove CC_ADCmode Richard Henderson
2020-04-02 18:53 ` [PATCH v2 08/11] aarch64: Accept -1 as second argument to add<mode>3_carryin Richard Henderson
2020-04-02 18:53 ` [PATCH v2 09/11] aarch64: Adjust result of aarch64_gen_compare_reg Richard Henderson
2020-04-02 18:53 ` [PATCH v2 10/11] aarch64: Implement TImode comparisons Richard Henderson
2020-04-02 18:53 ` Richard Henderson [this message]
2020-04-02 18:55 ` [PATCH v2 00/11] " Richard Henderson
2020-04-03 11:34 ` Richard Earnshaw (lists)
2020-04-03 12:27 ` Richard Sandiford
2020-04-03 13:17 ` Richard Earnshaw (lists)
2020-04-03 15:03 ` Richard Sandiford
2020-04-06 9:27 ` Richard Earnshaw (lists)
2020-04-06 11:19 ` Richard Sandiford
2020-04-06 12:22 ` Richard Biener
2020-04-08 9:10 ` Richard Sandiford
2020-04-07 9:52 ` Richard Earnshaw (lists)
2020-04-07 16:32 ` Richard Sandiford
2020-04-07 17:05 ` Richard Henderson
2020-04-07 19:43 ` Segher Boessenkool
2020-04-07 20:27 ` Segher Boessenkool
2020-04-07 21:43 ` Richard Henderson
2020-04-07 23:58 ` Segher Boessenkool
2020-04-08 0:50 ` Richard Henderson
2020-04-08 20:56 ` Segher Boessenkool
2020-04-08 9:06 ` Richard Sandiford
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