From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.120]) by sourceware.org (Postfix) with ESMTP id 81CB5385BF92 for ; Thu, 2 Apr 2020 22:26:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 81CB5385BF92 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-135-71wrEmn2ONSzHPiqdPuLkg-1; Thu, 02 Apr 2020 18:26:41 -0400 X-MC-Unique: 71wrEmn2ONSzHPiqdPuLkg-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 79CD5107ACC9; Thu, 2 Apr 2020 22:26:40 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-113-52.ams2.redhat.com [10.36.113.52]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0F0B6196AE; Thu, 2 Apr 2020 22:26:39 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id 032MQbUG009282; Fri, 3 Apr 2020 00:26:38 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id 032MQbFk009281; Fri, 3 Apr 2020 00:26:37 +0200 Date: Fri, 3 Apr 2020 00:26:36 +0200 From: Jakub Jelinek To: Uros Bizjak , Jeff Law Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] i386: Don't use AVX512F integral masks for V*TImode [PR94438] Message-ID: <20200402222636.GW2212@tucnak> Reply-To: Jakub Jelinek MIME-Version: 1.0 User-Agent: Mutt/1.11.3 (2019-02-01) X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-Spam-Status: No, score=-20.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Apr 2020 22:26:47 -0000 Hi! The ix86_get_mask_mode hook uses int mask for 512-bit vectors or 128/256-bi= t vectors with AVX512VL (that is correct), and only for V*[SD][IF]mode if not AVX512BW (also correct), but with AVX512BW it would stop checking the elem_size altogether and pretend the hw has masking support for V*TImode etc., which it doesn't. That can lead to various ICEs later on. Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2020-04-02 Jakub Jelinek =09PR target/94438 =09* config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_si= ze =091, 2, 4 and 8. =09* gcc.target/i386/avx512bw-pr94438.c: New test. =09* gcc.target/i386/avx512vlbw-pr94438.c: New test. --- gcc/config/i386/i386.c.jj=092020-03-17 13:50:52.916933781 +0100 +++ gcc/config/i386/i386.c=092020-04-02 17:14:00.202672882 +0200 @@ -21771,7 +21771,9 @@ ix86_get_mask_mode (machine_mode data_mo if ((TARGET_AVX512F && vector_size =3D=3D 64) || (TARGET_AVX512VL && (vector_size =3D=3D 32 || vector_size =3D=3D = 16))) { - if (elem_size =3D=3D 4 || elem_size =3D=3D 8 || TARGET_AVX512BW) + if (elem_size =3D=3D 4 +=09 || elem_size =3D=3D 8 +=09 || (TARGET_AVX512BW && (elem_size =3D=3D 1 || elem_size =3D=3D 2))) =09return smallest_int_mode_for_size (nunits); } =20 --- gcc/testsuite/gcc.target/i386/avx512bw-pr94438.c.jj=092020-04-02 17:18:= 37.374587069 +0200 +++ gcc/testsuite/gcc.target/i386/avx512bw-pr94438.c=092020-04-02 17:17:15.= 928787665 +0200 @@ -0,0 +1,13 @@ +/* PR target/94438 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-mavx512bw" } */ + +typedef __attribute__ ((__vector_size__ (4 * sizeof (__int128)))) __int128= V; +void bar (V); + +void +foo (V w) +{ + V v =3D 0 <=3D (0 >=3D w); + bar (v); +} --- gcc/testsuite/gcc.target/i386/avx512vlbw-pr94438.c.jj=092020-04-02 17:1= 8:08.272016069 +0200 +++ gcc/testsuite/gcc.target/i386/avx512vlbw-pr94438.c=092020-04-02 17:16:2= 5.302533951 +0200 @@ -0,0 +1,13 @@ +/* PR target/94438 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-mavx512bw -mavx512vl" } */ + +typedef __attribute__ ((__vector_size__ (sizeof (__int128)))) __int128 V; +void bar (V); + +void +foo (V w) +{ + V v =3D 0 <=3D (0 >=3D w); + bar (v); +} =09Jakub