From: Segher Boessenkool <segher@kernel.crashing.org>
To: Richard Biener <richard.guenther@gmail.com>
Cc: "David Edelsohn" <dje.gcc@gmail.com>,
"Martin Liška" <mliska@suse.cz>,
"GCC Patches" <gcc-patches@gcc.gnu.org>,
"Richard Sandiford" <richard.sandiford@arm.com>
Subject: Re: [stage1][PATCH] Lower VEC_COND_EXPR into internal functions.
Date: Wed, 3 Jun 2020 12:01:39 -0500 [thread overview]
Message-ID: <20200603170139.GY31009@gate.crashing.org> (raw)
In-Reply-To: <CAFiYyc1awC6f3ampc6Afzk1VFA0OWm+oXZ1p-fC6OG0m-yxNVg@mail.gmail.com>
Hi!
On Wed, Jun 03, 2020 at 04:46:12PM +0200, Richard Biener wrote:
> On Wed, Jun 3, 2020 at 4:17 PM David Edelsohn <dje.gcc@gmail.com> wrote:
> > On Wed, Jun 3, 2020 at 9:41 AM Richard Sandiford
> > <richard.sandiford@arm.com> wrote:
> > > Well, it seems unfortunate to have to do that.
> > >
> > > I think Martin's powerpc patch is the correct one.
It is papering over the issues a little -- the same assumption is made
at lower levels as well, so all *that* needs to be changed as well (not
"fixed", it is not a bug, we have a change in the vcond* interface here;
oh and that should be documented as well).
> > How about (3) help to remove reliance on this incorrect behavior from
> > the PowerPC port?
It is not a reliance on incorrect behaviour. This is a change. Which
pretty much everyone seems to want, so fine, but that takes time.
> > I didn't formally check, but if this is 16 years old, then it's from
> > the original RHES Altivec work.
It is, exactly.
> > I don't believe that anyone fundamentally is objecting to "fixing this
> > correctly". I don't know the entire history of this discussion, but
> > my objection is to a fix that breaks a long-time assumption of the
> > PowerPC port and leaves it as an exercise to the PowerPC maintainers
> > to fix it.
*Exactly*. This is changing an ancient interface, claiming "it always
was that way" (which very obviously isn't true), and leaving the rs6000
people to deal with all the fallout. Again.
> I _think_ there's nothing to fix besides removing the FAIL.
All the lower levels need to get asserts as well. We need a week or so
to put the whole thing through the wringer. The documentation needs to
be changed by whoever changes the vcond* semantics. All other ports
should be checked, too.
> And I would
> have no idea how to "fix" the powerpc port here since a) we lack a testcase
> that actually FAILs, b) I'm not familiar with the ISA. So we did (3) by
> replacing the FAILs with gcc_unreachable () and bootstrap/regtest this
> without any regression which I think "proves" the failure modes do not
> actually exist.
Heh, assuming the testsuite is comprehensive? Heh. (Bootstrap doesn't
mean much for vector code).
> So I'm not sure how we can help.
You'll have to document the "vcond* is not allowed to FAIL" change.
We'll deal with the rest. But testing needs a week or so. (That is
an extremely short timescale already).
> A vcond can usually be emulated by vec_cmp plus masking.
That would be the generic way to implement this of course, but apparently
such code doesn't yet exist? If there is a generic implementation it
should be trivial to deal with FAILs.
> So if
> we ever get a testcase that runs into the gcc_unreachable () I'll promise
> to fix it up using this strategy in the vcond expander. But without a
> testcase and powerpc ISA knowledge it's really hard. Or do you want
> us to stick the vec_cmp expansion fallback in place of the FAILs?
> I'm sure the powerpc maintainers are better suited to do that even though
> I'll probably manage with some cut&paste. To recap: vcond is
> equal to
>
> mask = vec_cmp of the comparison
> true_masked = true_op & mask;
> false_masked = false_op & ~mask;
> result = true_masked | false_masked;
>
> but I believe this would be dead code never triggered.
But that would be the generic code as well? Is that not useful to have
in any case?
Segher
next prev parent reply other threads:[~2020-06-03 17:01 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-24 10:25 [PATCH][RFC] Come up with VEC_COND_OP_EXPRs Martin Liška
2019-09-24 11:11 ` Richard Sandiford
2019-09-24 11:29 ` Richard Biener
2019-09-24 11:57 ` Richard Sandiford
2019-09-24 12:18 ` Richard Biener
2019-09-24 14:51 ` Richard Sandiford
2020-04-01 10:19 ` [stage1][PATCH] Lower VEC_COND_EXPR into internal functions Martin Liška
2020-04-06 9:17 ` Richard Sandiford
2020-04-06 12:30 ` Richard Biener
2020-05-21 12:51 ` Martin Liška
2020-05-21 13:29 ` Martin Liška
2020-05-21 20:16 ` Segher Boessenkool
2020-05-22 11:14 ` Richard Biener
2020-05-26 10:15 ` Richard Sandiford
2020-05-27 14:04 ` Martin Liška
2020-05-27 16:13 ` Richard Sandiford
2020-05-27 16:32 ` Richard Biener
2020-05-28 14:46 ` Martin Liška
2020-05-28 15:28 ` Richard Sandiford
2020-05-29 12:17 ` Richard Biener
2020-05-29 12:43 ` Richard Biener
2020-05-29 16:47 ` Segher Boessenkool
2020-05-29 17:05 ` Richard Sandiford
2020-05-29 17:30 ` Segher Boessenkool
2020-05-29 15:39 ` Segher Boessenkool
2020-05-29 16:57 ` Richard Sandiford
2020-05-29 17:09 ` Segher Boessenkool
2020-05-29 17:26 ` Richard Sandiford
2020-05-29 17:37 ` Segher Boessenkool
2020-05-30 7:15 ` Richard Sandiford
2020-05-30 13:08 ` Segher Boessenkool
2020-06-02 11:09 ` Richard Biener
2020-06-02 15:00 ` Martin Liška
2020-06-03 7:38 ` Richard Biener
2020-06-03 13:41 ` Richard Sandiford
2020-06-03 14:17 ` David Edelsohn
2020-06-03 14:46 ` Richard Biener
2020-06-03 17:01 ` Segher Boessenkool [this message]
2020-06-03 17:23 ` Richard Biener
2020-06-03 18:23 ` Segher Boessenkool
2020-06-03 18:38 ` Richard Biener
2020-06-03 18:46 ` David Edelsohn
2020-06-03 19:09 ` Segher Boessenkool
2020-06-03 19:13 ` Jakub Jelinek
2020-06-03 18:27 ` Segher Boessenkool
2020-06-08 11:04 ` Martin Liška
2020-06-09 13:42 ` Richard Biener
2020-06-10 8:51 ` Martin Liška
2020-06-10 10:50 ` Richard Biener
2020-06-10 12:27 ` Martin Liška
2020-06-10 13:01 ` Martin Liška
2020-06-11 8:52 ` Martin Liška
2020-06-12 9:43 ` Richard Biener
2020-06-12 13:24 ` Martin Liška
2020-06-15 7:14 ` Richard Biener
2020-06-15 11:19 ` Martin Liška
2020-06-15 11:59 ` Richard Biener
2020-06-15 12:20 ` Martin Liška
2020-06-17 8:50 ` Richard Biener
2020-06-17 13:15 ` Richard Biener
2020-06-18 8:10 ` Martin Liška
2020-06-18 8:52 ` Richard Biener
2020-06-18 9:02 ` Martin Liška
2020-06-18 9:29 ` Martin Liška
2020-04-06 12:33 ` Richard Biener
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