* [PATCH 1/7] PowerPC tests: Add prefixed/pcrel tests.
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-09 1:09 ` Segher Boessenkool
2020-06-01 19:53 ` [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests Michael Meissner
` (8 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* lib/target-supports.exp (check_effective_target_powerpc_pcrel):
New.
(check_effective_target_powerpc_prefixed_addr): New.
---
gcc/testsuite/lib/target-supports.exp | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b335108..9d880f4 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2163,6 +2163,25 @@ proc check_p9vector_hw_available { } {
}]
}
+# Return 1 if the target generates PC-relative instructions automatically for
+# the PowerPC 'future' machine.
+proc check_effective_target_powerpc_pcrel { } {
+ return [check_no_messages_and_pattern powerpc_pcrel \
+ {\mpla\M} assembly {
+ static unsigned short s;
+ unsigned short *p_foo (void) { return &s; }
+ } {-O2 -mcpu=future}]
+}
+
+# Return 1 if the target generates prefixed instructions automatically for the
+# PowerPC 'future' machine.
+proc check_effective_target_powerpc_prefixed_addr { } {
+ return [check_no_messages_and_pattern powerpc_prefixed_addr \
+ {\mplwz\M} assembly {
+ unsigned int foo (unsigned int *p) { return p[0x12345]; }
+ } {-O2 -mcpu=future}]
+}
+
# Return 1 if the target supports executing power9 modulo instructions, 0
# otherwise. Cache the result.
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 1/7] PowerPC tests: Add prefixed/pcrel tests.
2020-06-01 19:53 ` [PATCH 1/7] PowerPC tests: Add prefixed/pcrel tests Michael Meissner
@ 2020-06-09 1:09 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-09 1:09 UTC (permalink / raw)
To: Michael Meissner; +Cc: gcc-patches, David Edelsohn
Hi!
On Mon, Jun 01, 2020 at 03:53:36PM -0400, Michael Meissner wrote:
> +# Return 1 if the target generates PC-relative instructions automatically for
> +# the PowerPC 'future' machine.
"... automatically, for configurations that allow it"?
If the selector was only for the "future" target, that should be part of
the name; but it is not, that is just a detail of the actual test.
> +proc check_effective_target_powerpc_pcrel { } {
> + return [check_no_messages_and_pattern powerpc_pcrel \
> + {\mpla\M} assembly {
> + static unsigned short s;
> + unsigned short *p_foo (void) { return &s; }
> + } {-O2 -mcpu=future}]
> +}
> +# Return 1 if the target generates prefixed instructions automatically for the
> +# PowerPC 'future' machine.
Same here.
(It is important that the description for each selector is clear and
accurate, and guides the potential user to what selector to use where).
Okay for trunk with that changed. Thanks!
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
2020-06-01 19:53 ` [PATCH 1/7] PowerPC tests: Add prefixed/pcrel tests Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-25 16:52 ` Segher Boessenkool
2020-06-01 19:53 ` [PATCH 3/7] PowerPC tests: Add prefixed vs. DS/DQ instruction tests Michael Meissner
` (7 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
Add tests for -mcpu=future that test the generation of PADDI (and PLI which
becomes PADDI).
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-add.c: New test.
* gcc.target/powerpc/prefix-si-constant.c: New test.
* gcc.target/powerpc/prefix-di-constant.c: New test.
---
gcc/testsuite/gcc.target/powerpc/prefix-add.c | 14 ++++++++++++++
gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c | 13 +++++++++++++
gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c | 0
gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c | 12 ++++++++++++
4 files changed, 39 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-add.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-add.c b/gcc/testsuite/gcc.target/powerpc/prefix-add.c
new file mode 100644
index 0000000..26ef23e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-add.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test that PADDI is generated to add a large constant. */
+unsigned long
+add (unsigned long a)
+{
+ return a + 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpaddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
new file mode 100644
index 0000000..389fdaa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant. */
+unsigned long long
+large (void)
+{
+ return 0x12345678ULL;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
new file mode 100644
index 0000000..e69de29
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c b/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
new file mode 100644
index 0000000..269fc0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant for SImode. */
+void
+large_si (unsigned int *p)
+{
+ *p = 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-01 19:53 ` [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests Michael Meissner
@ 2020-06-25 16:52 ` Segher Boessenkool
2020-06-27 5:49 ` Michael Meissner
2020-06-27 5:57 ` Michael Meissner
0 siblings, 2 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-25 16:52 UTC (permalink / raw)
To: Michael Meissner; +Cc: gcc-patches, David Edelsohn
On Mon, Jun 01, 2020 at 03:53:37PM -0400, Michael Meissner wrote:
> Add tests for -mcpu=future that test the generation of PADDI (and PLI which
> becomes PADDI).
>
> 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
>
> * gcc.target/powerpc/prefix-add.c: New test.
> * gcc.target/powerpc/prefix-si-constant.c: New test.
> * gcc.target/powerpc/prefix-di-constant.c: New test.
This is okay for trunk (with required changes: -mdejagnu-cpu=power10,
and the selector names have changed to be something with power10 instead
of something with future; please retest before commit).
Thanks!
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-25 16:52 ` Segher Boessenkool
@ 2020-06-27 5:49 ` Michael Meissner
2020-06-27 18:55 ` Segher Boessenkool
2020-06-27 5:57 ` Michael Meissner
1 sibling, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-27 5:49 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
On Thu, Jun 25, 2020 at 11:52:50AM -0500, Segher Boessenkool wrote:
> On Mon, Jun 01, 2020 at 03:53:37PM -0400, Michael Meissner wrote:
> > Add tests for -mcpu=future that test the generation of PADDI (and PLI which
> > becomes PADDI).
> >
> > 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
> >
> > * gcc.target/powerpc/prefix-add.c: New test.
> > * gcc.target/powerpc/prefix-si-constant.c: New test.
> > * gcc.target/powerpc/prefix-di-constant.c: New test.
>
> This is okay for trunk (with required changes: -mdejagnu-cpu=power10,
> and the selector names have changed to be something with power10 instead
> of something with future; please retest before commit).
Done. I was just about to resubmit the patches with the -mcpu=power10 changes.
I did retest on power8/power9 little endian, and power8 big endian (both
32/64-bit). In running the tests, I discovered 3 of the tests that needed
ILP64 to test the particular code that I was looking for that I previously
hadn't flagged.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-27 5:49 ` Michael Meissner
@ 2020-06-27 18:55 ` Segher Boessenkool
2020-06-29 18:23 ` Michael Meissner
0 siblings, 1 reply; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-27 18:55 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
On Sat, Jun 27, 2020 at 01:49:23AM -0400, Michael Meissner wrote:
> On Thu, Jun 25, 2020 at 11:52:50AM -0500, Segher Boessenkool wrote:
> > On Mon, Jun 01, 2020 at 03:53:37PM -0400, Michael Meissner wrote:
> > > Add tests for -mcpu=future that test the generation of PADDI (and PLI which
> > > becomes PADDI).
> > >
> > > 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
> > >
> > > * gcc.target/powerpc/prefix-add.c: New test.
> > > * gcc.target/powerpc/prefix-si-constant.c: New test.
> > > * gcc.target/powerpc/prefix-di-constant.c: New test.
> >
> > This is okay for trunk (with required changes: -mdejagnu-cpu=power10,
> > and the selector names have changed to be something with power10 instead
> > of something with future; please retest before commit).
>
> Done. I was just about to resubmit the patches with the -mcpu=power10 changes.
> I did retest on power8/power9 little endian, and power8 big endian (both
> 32/64-bit). In running the tests, I discovered 3 of the tests that needed
> ILP64 to test the particular code that I was looking for that I previously
> hadn't flagged.
Please post what you committed, then?
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-27 18:55 ` Segher Boessenkool
@ 2020-06-29 18:23 ` Michael Meissner
2020-06-29 18:42 ` Segher Boessenkool
0 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-29 18:23 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
From 212475e5757fe3335cba30c9c3eec1707ac0c271 Mon Sep 17 00:00:00 2001
From: Michael Meissner <meissner@linux.ibm.com>
Date: Sat, 27 Jun 2020 00:40:48 -0500
Subject: [PATCH, committed] Add PowerPC tests for power10.
2020-06-27 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-add.c: New test.
* gcc.target/powerpc/prefix-si-constant.c: New test.
* gcc.target/powerpc/prefix-di-constant.c: New test.
* gcc.target/powerpc/prefix-ds-dq.c: New test.
* gcc.target/powerpc/prefix-no-update.c: New test.
* gcc.target/powerpc/prefix-large-dd.c: New test.
* gcc.target/powerpc/prefix-large-df.c: New test.
* gcc.target/powerpc/prefix-large-di.c: New test.
* gcc.target/powerpc/prefix-large-hi.c: New test.
* gcc.target/powerpc/prefix-large-kf.c: New test.
* gcc.target/powerpc/prefix-large-qi.c: New test.
* gcc.target/powerpc/prefix-large-sd.c: New test.
* gcc.target/powerpc/prefix-large-sf.c: New test.
* gcc.target/powerpc/prefix-large-si.c: New test.
* gcc.target/powerpc/prefix-large-udi.c: New test.
* gcc.target/powerpc/prefix-large-uhi.c: New test.
* gcc.target/powerpc/prefix-large-uqi.c: New test.
* gcc.target/powerpc/prefix-large-usi.c: New test.
* gcc.target/powerpc/prefix-large-v2df.c: New test.
* gcc.target/powerpc/prefix-large.h: Include file for new tests.
* gcc.target/powerpc/prefix-pcrel-dd.c: New test.
* gcc.target/powerpc/prefix-pcrel-df.c: New test.
* gcc.target/powerpc/prefix-pcrel-di.c: New test.
* gcc.target/powerpc/prefix-pcrel-hi.c: New test.
* gcc.target/powerpc/prefix-pcrel-kf.c: New test.
* gcc.target/powerpc/prefix-pcrel-qi.c: New test.
* gcc.target/powerpc/prefix-pcrel-sd.c: New test.
* gcc.target/powerpc/prefix-pcrel-sf.c: New test.
* gcc.target/powerpc/prefix-pcrel-si.c: New test.
* gcc.target/powerpc/prefix-pcrel-udi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uhi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uqi.c: New test.
* gcc.target/powerpc/prefix-pcrel-usi.c: New test.
* gcc.target/powerpc/prefix-pcrel-v2df.c: New test.
* gcc.target/powerpc/prefix-pcrel.h: Include file for new tests.
* gcc.target/powerpc/prefix-stack-protect.c: New test.
---
gcc/testsuite/gcc.target/powerpc/prefix-add.c | 14 ++
.../gcc.target/powerpc/prefix-di-constant.c | 13 ++
.../gcc.target/powerpc/prefix-ds-dq.c | 161 ++++++++++++++++++
.../gcc.target/powerpc/prefix-large-dd.c | 13 ++
.../gcc.target/powerpc/prefix-large-df.c | 13 ++
.../gcc.target/powerpc/prefix-large-di.c | 14 ++
.../gcc.target/powerpc/prefix-large-hi.c | 13 ++
.../gcc.target/powerpc/prefix-large-kf.c | 13 ++
.../gcc.target/powerpc/prefix-large-qi.c | 13 ++
.../gcc.target/powerpc/prefix-large-sd.c | 19 +++
.../gcc.target/powerpc/prefix-large-sf.c | 13 ++
.../gcc.target/powerpc/prefix-large-si.c | 13 ++
.../gcc.target/powerpc/prefix-large-udi.c | 14 ++
.../gcc.target/powerpc/prefix-large-uhi.c | 13 ++
.../gcc.target/powerpc/prefix-large-uqi.c | 13 ++
.../gcc.target/powerpc/prefix-large-usi.c | 13 ++
.../gcc.target/powerpc/prefix-large-v2df.c | 13 ++
.../gcc.target/powerpc/prefix-large.h | 40 +++++
.../gcc.target/powerpc/prefix-no-update.c | 51 ++++++
.../gcc.target/powerpc/prefix-pcrel-dd.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-df.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-di.c | 14 ++
.../gcc.target/powerpc/prefix-pcrel-hi.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-kf.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-qi.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-sd.c | 15 ++
.../gcc.target/powerpc/prefix-pcrel-sf.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-si.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-udi.c | 14 ++
.../gcc.target/powerpc/prefix-pcrel-uhi.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-uqi.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-usi.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel-v2df.c | 13 ++
.../gcc.target/powerpc/prefix-pcrel.h | 41 +++++
.../gcc.target/powerpc/prefix-si-constant.c | 12 ++
.../gcc.target/powerpc/prefix-stack-protect.c | 21 +++
36 files changed, 729 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-add.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large.h
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-add.c b/gcc/testsuite/gcc.target/powerpc/prefix-add.c
new file mode 100644
index 00000000000..0027406e457
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-add.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PADDI is generated to add a large constant. */
+unsigned long
+add (unsigned long a)
+{
+ return a + 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpaddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
new file mode 100644
index 00000000000..aca7897cd92
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant. */
+unsigned long long
+large (void)
+{
+ return 0x12345678ULL;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
new file mode 100644
index 00000000000..554cd0c1bea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
@@ -0,0 +1,161 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether we generate a prefixed load/store operation for addresses that
+ don't meet DS/DQ offset constraints. 64-bit is needed for testing the use
+ of the PLWA instruciton. */
+
+struct packed_struct
+{
+ long long pad; /* offset 0 bytes. */
+ unsigned char pad_uc; /* offset 8 bytes. */
+ unsigned char uc; /* offset 9 bytes. */
+
+ unsigned char pad_sc[sizeof (long long) - sizeof (unsigned char)];
+ unsigned char sc; /* offset 17 bytes. */
+
+ unsigned char pad_us[sizeof (long long) - sizeof (signed char)];
+ unsigned short us; /* offset 25 bytes. */
+
+ unsigned char pad_ss[sizeof (long long) - sizeof (unsigned short)];
+ short ss; /* offset 33 bytes. */
+
+ unsigned char pad_ui[sizeof (long long) - sizeof (short)];
+ unsigned int ui; /* offset 41 bytes. */
+
+ unsigned char pad_si[sizeof (long long) - sizeof (unsigned int)];
+ unsigned int si; /* offset 49 bytes. */
+
+ unsigned char pad_f[sizeof (long long) - sizeof (int)];
+ float f; /* offset 57 bytes. */
+
+ unsigned char pad_d[sizeof (long long) - sizeof (float)];
+ double d; /* offset 65 bytes. */
+ __float128 f128; /* offset 73 bytes. */
+} __attribute__((packed));
+
+unsigned char
+load_uc (struct packed_struct *p)
+{
+ return p->uc; /* LBZ 3,9(3). */
+}
+
+signed char
+load_sc (struct packed_struct *p)
+{
+ return p->sc; /* LBZ 3,17(3) + EXTSB 3,3. */
+}
+
+unsigned short
+load_us (struct packed_struct *p)
+{
+ return p->us; /* LHZ 3,25(3). */
+}
+
+short
+load_ss (struct packed_struct *p)
+{
+ return p->ss; /* LHA 3,33(3). */
+}
+
+unsigned int
+load_ui (struct packed_struct *p)
+{
+ return p->ui; /* LWZ 3,41(3). */
+}
+
+int
+load_si (struct packed_struct *p)
+{
+ return p->si; /* PLWA 3,49(3). */
+}
+
+float
+load_float (struct packed_struct *p)
+{
+ return p->f; /* LFS 1,57(3). */
+}
+
+double
+load_double (struct packed_struct *p)
+{
+ return p->d; /* LFD 1,65(3). */
+}
+
+__float128
+load_float128 (struct packed_struct *p)
+{
+ return p->f128; /* PLXV 34,73(3). */
+}
+
+void
+store_uc (struct packed_struct *p, unsigned char uc)
+{
+ p->uc = uc; /* STB 4,9(3). */
+}
+
+void
+store_sc (struct packed_struct *p, signed char sc)
+{
+ p->sc = sc; /* STB 4,17(3). */
+}
+
+void
+store_us (struct packed_struct *p, unsigned short us)
+{
+ p->us = us; /* STH 4,25(3). */
+}
+
+void
+store_ss (struct packed_struct *p, signed short ss)
+{
+ p->ss = ss; /* STH 4,33(3). */
+}
+
+void
+store_ui (struct packed_struct *p, unsigned int ui)
+{
+ p->ui = ui; /* STW 4,41(3). */
+}
+
+void
+store_si (struct packed_struct *p, signed int si)
+{
+ p->si = si; /* STW 4,49(3). */
+}
+
+void
+store_float (struct packed_struct *p, float f)
+{
+ p->f = f; /* STFS 1,57(3). */
+}
+
+void
+store_double (struct packed_struct *p, double d)
+{
+ p->d = d; /* STFD 1,65(3). */
+}
+
+void
+store_float128 (struct packed_struct *p, __float128 f128)
+{
+ p->f128 = f128; /* PSTXV 34,1(3). */
+}
+
+/* { dg-final { scan-assembler-times {\mextsb\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlha\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlhz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlwz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplwa\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstb\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\msth\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
new file mode 100644
index 00000000000..d3a35977de8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
new file mode 100644
index 00000000000..49a049b777a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the double type. */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
new file mode 100644
index 00000000000..399f6967ed9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the long long type. */
+
+#define TYPE long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
new file mode 100644
index 00000000000..18380cac49b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the short type. */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
new file mode 100644
index 00000000000..a6038bd86ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
new file mode 100644
index 00000000000..24cdac16e99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
new file mode 100644
index 00000000000..beb2d9f62b0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal32 type. Note, the _Decimal32 type will not generate any
+ prefixed load or stores, because there is no prefixed load/store instruction
+ to load up a vector register as a zero extended 32-bit integer. So we count
+ the number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpli\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
new file mode 100644
index 00000000000..9fde1f0a7a6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the float type. */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
new file mode 100644
index 00000000000..876a013a2ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
new file mode 100644
index 00000000000..e6365d37d0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
new file mode 100644
index 00000000000..3523767a6f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
new file mode 100644
index 00000000000..f251c4a12c2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
new file mode 100644
index 00000000000..d60036da026
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
new file mode 100644
index 00000000000..f6d042f0984
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large.h b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
new file mode 100644
index 00000000000..07b38ae0875
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
@@ -0,0 +1,40 @@
+/* Common tests for prefixed instructions testing whether we can generate a
+ 34-bit offset using 1 instruction. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT 0x12480UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+ p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (TYPE *p)
+{
+ return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, TYPE a)
+{
+ p[CONSTANT] = a;
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
new file mode 100644
index 00000000000..837fcd77c0b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
@@ -0,0 +1,51 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Make sure that we don't generate a prefixed form of the load and store with
+ update instructions (i.e. instead of generating LWZU we have to generate
+ PLWZ plus a PADDI). */
+
+#ifndef SIZE
+#define SIZE 50000
+#endif
+
+struct foo {
+ unsigned int field;
+ char pad[SIZE];
+};
+
+struct foo *inc_load (struct foo *p, unsigned int *q)
+{
+ *q = (++p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *dec_load (struct foo *p, unsigned int *q)
+{
+ *q = (--p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *inc_store (struct foo *p, unsigned int *q)
+{
+ (++p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+struct foo *dec_store (struct foo *p, unsigned int *q)
+{
+ (--p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+/* { dg-final { scan-assembler-times {\mlwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpaddi\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mplwzu\M} } } */
+/* { dg-final { scan-assembler-not {\mpstwu\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
new file mode 100644
index 00000000000..165aa2f9aa0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
new file mode 100644
index 00000000000..b7fd84e7de2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ double type. */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
new file mode 100644
index 00000000000..90081e452a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ long long type. */
+
+#define TYPE long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
new file mode 100644
index 00000000000..71357b7d149
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ short type. */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
new file mode 100644
index 00000000000..94bcbdc67d9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
new file mode 100644
index 00000000000..472360c08f6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
new file mode 100644
index 00000000000..94c076d3ed6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal32 type. Note, the _Decimal32 type will not generate any prefixed
+ load or stores, because there is no prefixed load/store instruction to load
+ up a vector register as a zero extended 32-bit integer. So we count the
+ number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpla\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
new file mode 100644
index 00000000000..0e907e07d00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ float type. */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
new file mode 100644
index 00000000000..fb90fcd878f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ int type. */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
new file mode 100644
index 00000000000..940040fc5aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
new file mode 100644
index 00000000000..5c8d082e831
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
new file mode 100644
index 00000000000..68999192d54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
new file mode 100644
index 00000000000..5948f8254c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
new file mode 100644
index 00000000000..d626b8a128e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
new file mode 100644
index 00000000000..26175dc7d1e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
@@ -0,0 +1,41 @@
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for each type. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+static TYPE a;
+
+/* Make sure a is not optimized away. */
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+ a += b;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (void)
+{
+ return a;
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE b)
+{
+ a = b;
+}
+#endif
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c b/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
new file mode 100644
index 00000000000..6403aa8024c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-si-constant.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+/* Test that PLI (PADDI) is generated to load a large constant for SImode. */
+void
+large_si (unsigned int *p)
+{
+ *p = 0x12345U;
+}
+
+/* { dg-final { scan-assembler {\mpli\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c b/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
new file mode 100644
index 00000000000..ca3b3dfd89f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
@@ -0,0 +1,21 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector-strong" } */
+
+/* Test that we can handle large stack frames with -fstack-protector-strong and
+ prefixed addressing. This was originally discovered when trying to build
+ glibc with -mcpu=power10, and vfwprintf.c failed because it used
+ -fstack-protector-strong. It needs 64-bit due to the size of the stack. */
+
+extern long foo (char *);
+
+long
+bar (void)
+{
+ char buffer[0x20000];
+ return foo (buffer) + 1;
+}
+
+/* { dg-final { scan-assembler {\mpld\M} } } */
+/* { dg-final { scan-assembler {\mpstd\M} } } */
--
2.17.1
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-29 18:23 ` Michael Meissner
@ 2020-06-29 18:42 ` Segher Boessenkool
2020-06-30 5:58 ` Michael Meissner
0 siblings, 1 reply; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-29 18:42 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
Hi!
On Mon, Jun 29, 2020 at 02:23:22PM -0400, Michael Meissner wrote:
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_prefixed_addr } */
> +/* { dg-require-effective-target lp64 } */
Please always say (_in the test_) why something is required, if it isn't
obvious.
> +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
> +
> +/* Test that PLI (PADDI) is generated to load a large constant. */
> +unsigned long long
> +large (void)
> +{
> + return 0x12345678ULL;
> +}
> +
> +/* { dg-final { scan-assembler {\mpli\M} } } */
I have no idea why 64-bit mode (or 64-bit addressing) is needed here.
*Is* it needed?
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
> @@ -0,0 +1,161 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_prefixed_addr } */
> +/* { dg-require-effective-target lp64 } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
> + unsigned int si; /* offset 49 bytes. */
> +int
> +load_si (struct packed_struct *p)
> +{
> + return p->si; /* PLWA 3,49(3). */
> +}
Here it is because this would be just lwz on 32-bit.
But that is the only difference, so you could just make that single test
conditional, not the whole file.
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
> @@ -0,0 +1,51 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_prefixed_addr } */
> +/* { dg-require-effective-target lp64 } */
> +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
For this testcase, I have no idea at all why you want lp64?
Thanks,
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-29 18:42 ` Segher Boessenkool
@ 2020-06-30 5:58 ` Michael Meissner
2020-07-01 0:51 ` Segher Boessenkool
0 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-30 5:58 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
On Mon, Jun 29, 2020 at 01:42:56PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Jun 29, 2020 at 02:23:22PM -0400, Michael Meissner wrote:
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-di-constant.c
> > @@ -0,0 +1,13 @@
> > +/* { dg-do compile } */
> > +/* { dg-require-effective-target powerpc_prefixed_addr } */
> > +/* { dg-require-effective-target lp64 } */
>
> Please always say (_in the test_) why something is required, if it isn't
> obvious.
>
> > +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
> > +
> > +/* Test that PLI (PADDI) is generated to load a large constant. */
> > +unsigned long long
> > +large (void)
> > +{
> > + return 0x12345678ULL;
> > +}
> > +
> > +/* { dg-final { scan-assembler {\mpli\M} } } */
>
> I have no idea why 64-bit mode (or 64-bit addressing) is needed here.
> *Is* it needed?
Yes it is needed. Otherwise two separate load immediates would be needed to
load each part of the DI constant that is held in 2 registers.
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
> > @@ -0,0 +1,161 @@
> > +/* { dg-do compile } */
> > +/* { dg-require-effective-target powerpc_prefixed_addr } */
> > +/* { dg-require-effective-target lp64 } */
> > +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
>
> > + unsigned int si; /* offset 49 bytes. */
>
> > +int
> > +load_si (struct packed_struct *p)
> > +{
> > + return p->si; /* PLWA 3,49(3). */
> > +}
>
> Here it is because this would be just lwz on 32-bit.
>
> But that is the only difference, so you could just make that single test
> conditional, not the whole file.
>
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
> > @@ -0,0 +1,51 @@
> > +/* { dg-do compile } */
> > +/* { dg-require-effective-target powerpc_prefixed_addr } */
> > +/* { dg-require-effective-target lp64 } */
> > +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
>
> For this testcase, I have no idea at all why you want lp64?
Becuase to show the bug you need a stack frame larger than 64K.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-30 5:58 ` Michael Meissner
@ 2020-07-01 0:51 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-07-01 0:51 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
Hi!
On Tue, Jun 30, 2020 at 01:58:50AM -0400, Michael Meissner wrote:
> On Mon, Jun 29, 2020 at 01:42:56PM -0500, Segher Boessenkool wrote:
> > On Mon, Jun 29, 2020 at 02:23:22PM -0400, Michael Meissner wrote:
> > > +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
> > > +
> > > +/* Test that PLI (PADDI) is generated to load a large constant. */
> > > +unsigned long long
> > > +large (void)
> > > +{
> > > + return 0x12345678ULL;
> > > +}
> > > +
> > > +/* { dg-final { scan-assembler {\mpli\M} } } */
> >
> > I have no idea why 64-bit mode (or 64-bit addressing) is needed here.
> > *Is* it needed?
>
> Yes it is needed. Otherwise two separate load immediates would be needed to
> load each part of the DI constant that is held in 2 registers.
But that will work just fine, because one of those insns will be a pli,
exactly as tested for!
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
> > > @@ -0,0 +1,51 @@
> > > +/* { dg-do compile } */
> > > +/* { dg-require-effective-target powerpc_prefixed_addr } */
> > > +/* { dg-require-effective-target lp64 } */
> > > +/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
> >
> > For this testcase, I have no idea at all why you want lp64?
>
> Becuase to show the bug you need a stack frame larger than 64K.
I don't see it? (Also, why would that require lp64?)
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-25 16:52 ` Segher Boessenkool
2020-06-27 5:49 ` Michael Meissner
@ 2020-06-27 5:57 ` Michael Meissner
2020-06-27 18:58 ` Segher Boessenkool
1 sibling, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-27 5:57 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
On Thu, Jun 25, 2020 at 11:52:50AM -0500, Segher Boessenkool wrote:
> On Mon, Jun 01, 2020 at 03:53:37PM -0400, Michael Meissner wrote:
> > Add tests for -mcpu=future that test the generation of PADDI (and PLI which
> > becomes PADDI).
> >
> > 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
> >
> > * gcc.target/powerpc/prefix-add.c: New test.
> > * gcc.target/powerpc/prefix-si-constant.c: New test.
> > * gcc.target/powerpc/prefix-di-constant.c: New test.
>
> This is okay for trunk (with required changes: -mdejagnu-cpu=power10,
> and the selector names have changed to be something with power10 instead
> of something with future; please retest before commit).
Since all of these tests are for code that is in GCC 10, can I apply these
patches to the GCC 10 branch after the completion of the -mcpu=power10 changes
for GCC 10 and a suitable waiting period and retest?
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests.
2020-06-27 5:57 ` Michael Meissner
@ 2020-06-27 18:58 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-27 18:58 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
On Sat, Jun 27, 2020 at 01:57:52AM -0400, Michael Meissner wrote:
> On Thu, Jun 25, 2020 at 11:52:50AM -0500, Segher Boessenkool wrote:
> > On Mon, Jun 01, 2020 at 03:53:37PM -0400, Michael Meissner wrote:
> > > Add tests for -mcpu=future that test the generation of PADDI (and PLI which
> > > becomes PADDI).
> > >
> > > 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
> > >
> > > * gcc.target/powerpc/prefix-add.c: New test.
> > > * gcc.target/powerpc/prefix-si-constant.c: New test.
> > > * gcc.target/powerpc/prefix-di-constant.c: New test.
> >
> > This is okay for trunk (with required changes: -mdejagnu-cpu=power10,
> > and the selector names have changed to be something with power10 instead
> > of something with future; please retest before commit).
>
> Since all of these tests are for code that is in GCC 10, can I apply these
> patches to the GCC 10 branch after the completion of the -mcpu=power10 changes
> for GCC 10 and a suitable waiting period and retest?
Sure, thanks!
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 3/7] PowerPC tests: Add prefixed vs. DS/DQ instruction tests.
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
2020-06-01 19:53 ` [PATCH 1/7] PowerPC tests: Add prefixed/pcrel tests Michael Meissner
2020-06-01 19:53 ` [PATCH 2/7] PowerPC tests: Add PLI/PADDI tests Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-25 16:54 ` Segher Boessenkool
2020-06-01 19:53 ` [PATCH 4/7] PowerPC test: Add prefixed no update test Michael Meissner
` (6 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
Add test to make sure prefixed load/store instructions are generated if the
offset would not fit in the DS/DQ encodings.
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-ds-dq.c: New test.
---
gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c | 159 ++++++++++++++++++++++++
1 file changed, 159 insertions(+)
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
index e69de29..68fbad3 100644
--- a/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-ds-dq.c
@@ -0,0 +1,159 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether we generate a prefixed load/store operation for addresses that
+ don't meet DS/DQ offset constraints. */
+
+struct packed_struct
+{
+ long long pad; /* offset 0 bytes. */
+ unsigned char pad_uc; /* offset 8 bytes. */
+ unsigned char uc; /* offset 9 bytes. */
+
+ unsigned char pad_sc[sizeof (long long) - sizeof (unsigned char)];
+ unsigned char sc; /* offset 17 bytes. */
+
+ unsigned char pad_us[sizeof (long long) - sizeof (signed char)];
+ unsigned short us; /* offset 25 bytes. */
+
+ unsigned char pad_ss[sizeof (long long) - sizeof (unsigned short)];
+ short ss; /* offset 33 bytes. */
+
+ unsigned char pad_ui[sizeof (long long) - sizeof (short)];
+ unsigned int ui; /* offset 41 bytes. */
+
+ unsigned char pad_si[sizeof (long long) - sizeof (unsigned int)];
+ unsigned int si; /* offset 49 bytes. */
+
+ unsigned char pad_f[sizeof (long long) - sizeof (int)];
+ float f; /* offset 57 bytes. */
+
+ unsigned char pad_d[sizeof (long long) - sizeof (float)];
+ double d; /* offset 65 bytes. */
+ __float128 f128; /* offset 73 bytes. */
+} __attribute__((packed));
+
+unsigned char
+load_uc (struct packed_struct *p)
+{
+ return p->uc; /* LBZ 3,9(3). */
+}
+
+signed char
+load_sc (struct packed_struct *p)
+{
+ return p->sc; /* LBZ 3,17(3) + EXTSB 3,3. */
+}
+
+unsigned short
+load_us (struct packed_struct *p)
+{
+ return p->us; /* LHZ 3,25(3). */
+}
+
+short
+load_ss (struct packed_struct *p)
+{
+ return p->ss; /* LHA 3,33(3). */
+}
+
+unsigned int
+load_ui (struct packed_struct *p)
+{
+ return p->ui; /* LWZ 3,41(3). */
+}
+
+int
+load_si (struct packed_struct *p)
+{
+ return p->si; /* PLWA 3,49(3). */
+}
+
+float
+load_float (struct packed_struct *p)
+{
+ return p->f; /* LFS 1,57(3). */
+}
+
+double
+load_double (struct packed_struct *p)
+{
+ return p->d; /* LFD 1,65(3). */
+}
+
+__float128
+load_float128 (struct packed_struct *p)
+{
+ return p->f128; /* PLXV 34,73(3). */
+}
+
+void
+store_uc (struct packed_struct *p, unsigned char uc)
+{
+ p->uc = uc; /* STB 4,9(3). */
+}
+
+void
+store_sc (struct packed_struct *p, signed char sc)
+{
+ p->sc = sc; /* STB 4,17(3). */
+}
+
+void
+store_us (struct packed_struct *p, unsigned short us)
+{
+ p->us = us; /* STH 4,25(3). */
+}
+
+void
+store_ss (struct packed_struct *p, signed short ss)
+{
+ p->ss = ss; /* STH 4,33(3). */
+}
+
+void
+store_ui (struct packed_struct *p, unsigned int ui)
+{
+ p->ui = ui; /* STW 4,41(3). */
+}
+
+void
+store_si (struct packed_struct *p, signed int si)
+{
+ p->si = si; /* STW 4,49(3). */
+}
+
+void
+store_float (struct packed_struct *p, float f)
+{
+ p->f = f; /* STFS 1,57(3). */
+}
+
+void
+store_double (struct packed_struct *p, double d)
+{
+ p->d = d; /* STFD 1,65(3). */
+}
+
+void
+store_float128 (struct packed_struct *p, __float128 f128)
+{
+ p->f128 = f128; /* PSTXV 34,1(3). */
+}
+
+/* { dg-final { scan-assembler-times {\mextsb\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mlfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlha\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlhz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mlwz\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplwa\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mplxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstb\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfd\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstfs\M} 1 } } */
+/* { dg-final { scan-assembler-times {\msth\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH 4/7] PowerPC test: Add prefixed no update test
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (2 preceding siblings ...)
2020-06-01 19:53 ` [PATCH 3/7] PowerPC tests: Add prefixed vs. DS/DQ instruction tests Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-25 16:58 ` Segher Boessenkool
2020-06-01 19:53 ` [PATCH 5/7] PowerPC tests: Prefixed insn with large offsets Michael Meissner
` (5 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
This test makes sure we do not generate a prefixed instruction with an update
form.
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-no-update.c: New test.
---
.../gcc.target/powerpc/prefix-no-update.c | 50 ++++++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
new file mode 100644
index 0000000..e3c2e5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-no-update.c
@@ -0,0 +1,50 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Make sure that we don't generate a prefixed form of the load and store with
+ update instructions (i.e. instead of generating LWZU we have to generate
+ PLWZ plus a PADDI). */
+
+#ifndef SIZE
+#define SIZE 50000
+#endif
+
+struct foo {
+ unsigned int field;
+ char pad[SIZE];
+};
+
+struct foo *inc_load (struct foo *p, unsigned int *q)
+{
+ *q = (++p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *dec_load (struct foo *p, unsigned int *q)
+{
+ *q = (--p)->field; /* PLWZ, PADDI, STW. */
+ return p;
+}
+
+struct foo *inc_store (struct foo *p, unsigned int *q)
+{
+ (++p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+struct foo *dec_store (struct foo *p, unsigned int *q)
+{
+ (--p)->field = *q; /* LWZ, PADDI, PSTW. */
+ return p;
+}
+
+/* { dg-final { scan-assembler-times {\mlwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpaddi\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
+/* { dg-final { scan-assembler-not {\mplwzu\M} } } */
+/* { dg-final { scan-assembler-not {\mpstwu\M} } } */
+/* { dg-final { scan-assembler-not {\maddis\M} } } */
+/* { dg-final { scan-assembler-not {\maddi\M} } } */
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH 5/7] PowerPC tests: Prefixed insn with large offsets
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (3 preceding siblings ...)
2020-06-01 19:53 ` [PATCH 4/7] PowerPC test: Add prefixed no update test Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-01 19:53 ` [PATCH 6/7] PowerPC tests: Add PC-relative tests Michael Meissner
` (4 subsequent siblings)
9 siblings, 0 replies; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
Add tests to make sure for -mcpu=future that prefixed load/store instructions
are generated if the offset is larger than 16 bits.
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-large-dd.c: New test.
* gcc.target/powerpc/prefix-large-df.c: New test.
* gcc.target/powerpc/prefix-large-di.c: New test.
* gcc.target/powerpc/prefix-large-hi.c: New test.
* gcc.target/powerpc/prefix-large-kf.c: New test.
* gcc.target/powerpc/prefix-large-qi.c: New test.
* gcc.target/powerpc/prefix-large-sd.c: New test.
* gcc.target/powerpc/prefix-large-sf.c: New test.
* gcc.target/powerpc/prefix-large-si.c: New test.
* gcc.target/powerpc/prefix-large-udi.c: New test.
* gcc.target/powerpc/prefix-large-uhi.c: New test.
* gcc.target/powerpc/prefix-large-uqi.c: New test.
* gcc.target/powerpc/prefix-large-usi.c: New test.
* gcc.target/powerpc/prefix-large-v2df.c: New test.
* gcc.target/powerpc/prefix-large.h: Include file for new tests.
---
gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-df.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-di.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c | 16 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-si.c | 13 ++++++
.../gcc.target/powerpc/prefix-large-udi.c | 14 ++++++
.../gcc.target/powerpc/prefix-large-uhi.c | 14 ++++++
.../gcc.target/powerpc/prefix-large-uqi.c | 14 ++++++
.../gcc.target/powerpc/prefix-large-usi.c | 14 ++++++
.../gcc.target/powerpc/prefix-large-v2df.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-large.h | 51 ++++++++++++++++++++++
15 files changed, 240 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large.h
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
new file mode 100644
index 0000000..2000fdd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for _Decimal64 objects. */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
new file mode 100644
index 0000000..48c497b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for double objects. */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
new file mode 100644
index 0000000..aeb879e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for long objects. */
+
+#define TYPE long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
new file mode 100644
index 0000000..965b650
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for short objects. */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
new file mode 100644
index 0000000..a2a6330
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for __float128 objects. */
+
+#define TYPE __float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
new file mode 100644
index 0000000..df752ff
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for signed char objects. */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
new file mode 100644
index 0000000..1c91051
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for _Decimal32 objects. */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
new file mode 100644
index 0000000..f534e0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for float objects. */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
new file mode 100644
index 0000000..17d5c62
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for int objects. */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
new file mode 100644
index 0000000..8edd402
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned long
+ objects. */
+
+#define TYPE unsigned long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
new file mode 100644
index 0000000..5844791
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned short
+ objects. */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
new file mode 100644
index 0000000..0138503
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned char
+ objects. */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
new file mode 100644
index 0000000..a070a72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for unsigned int
+ objects. */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
new file mode 100644
index 0000000..bb0f95b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether we can generate a prefixed
+ load/store instruction that has a 34-bit offset for vector objects. */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large.h b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
new file mode 100644
index 0000000..dbc96cb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
@@ -0,0 +1,51 @@
+/* Common tests for prefixed instructions testing whether we can generate a
+ 34-bit offset using 1 instruction. */
+
+typedef signed char schar;
+typedef unsigned char uchar;
+typedef unsigned short ushort;
+typedef unsigned int uint;
+typedef unsigned long ulong;
+typedef long double ldouble;
+typedef vector double v2df;
+typedef vector long v2di;
+typedef vector float v4sf;
+typedef vector int v4si;
+
+#ifndef TYPE
+#define TYPE ulong
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT 0x123450UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+ p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (TYPE *p)
+{
+ return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, TYPE a)
+{
+ p[CONSTANT] = a;
+}
+#endif
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH 6/7] PowerPC tests: Add PC-relative tests.
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (4 preceding siblings ...)
2020-06-01 19:53 ` [PATCH 5/7] PowerPC tests: Prefixed insn with large offsets Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-01 22:45 ` will schmidt
2020-06-01 19:53 ` [PATCH 7/7] PowerPC test: Add prefixed stack protect test Michael Meissner
` (3 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
These tests make sure that PC-relative variant is generated for -mcpu=future on
systems that support PC-relative addressing.
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-pcrel-dd.c: New test.
* gcc.target/powerpc/prefix-pcrel-df.c: New test.
* gcc.target/powerpc/prefix-pcrel-di.c: New test.
* gcc.target/powerpc/prefix-pcrel-hi.c: New test.
* gcc.target/powerpc/prefix-pcrel-kf.c: New test.
* gcc.target/powerpc/prefix-pcrel-qi.c: New test.
* gcc.target/powerpc/prefix-pcrel-sd.c: New test.
* gcc.target/powerpc/prefix-pcrel-sf.c: New test.
* gcc.target/powerpc/prefix-pcrel-si.c: New test.
* gcc.target/powerpc/prefix-pcrel-udi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uhi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uqi.c: New test.
* gcc.target/powerpc/prefix-pcrel-usi.c: New test.
* gcc.target/powerpc/prefix-pcrel-v2df.c: New test.
* gcc.target/powerpc/prefix-pcrel.h: Include file for new tests.
---
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c | 16 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c | 13 ++++++
.../gcc.target/powerpc/prefix-pcrel-udi.c | 13 ++++++
.../gcc.target/powerpc/prefix-pcrel-uhi.c | 13 ++++++
.../gcc.target/powerpc/prefix-pcrel-uqi.c | 13 ++++++
.../gcc.target/powerpc/prefix-pcrel-usi.c | 13 ++++++
.../gcc.target/powerpc/prefix-pcrel-v2df.c | 13 ++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h | 52 ++++++++++++++++++++++
15 files changed, 237 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
new file mode 100644
index 0000000..f100c24
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
new file mode 100644
index 0000000..a9a0711
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the double type. */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
new file mode 100644
index 0000000..850c28b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the long type. */
+
+#define TYPE long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
new file mode 100644
index 0000000..06fa86f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the short type. */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
new file mode 100644
index 0000000..aba28ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the __float128 type. */
+
+#define TYPE __float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
new file mode 100644
index 0000000..ccce0f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
new file mode 100644
index 0000000..bd15b18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the _Decimal32 type. Note, the _Decimal32
+ type will not generate any prefixed load or stores, because there is no
+ prefixed load/store instruction to load up a vector register as a zero
+ extended 32-bit integer. So we count the number load addresses that are
+ generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpla\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
new file mode 100644
index 0000000..de70258
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the float type. */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
new file mode 100644
index 0000000..ce95972
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the int type. */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
new file mode 100644
index 0000000..c146e85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for unsigned long type. */
+
+#define TYPE unsigned long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
new file mode 100644
index 0000000..d9a4318
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
new file mode 100644
index 0000000..312e68d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
new file mode 100644
index 0000000..a84ae80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
new file mode 100644
index 0000000..cf549e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for the vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
new file mode 100644
index 0000000..474bf07
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
@@ -0,0 +1,52 @@
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for each type. */
+
+typedef signed char schar;
+typedef unsigned char uchar;
+typedef unsigned short ushort;
+typedef unsigned int uint;
+typedef unsigned long ulong;
+typedef long double ldouble;
+typedef vector double v2df;
+typedef vector long v2di;
+typedef vector float v4sf;
+typedef vector int v4si;
+
+#ifndef TYPE
+#define TYPE ulong
+#endif
+
+static TYPE a;
+
+/* Make sure a is not optimized away. */
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+ a += b;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (void)
+{
+ return a;
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE b)
+{
+ a = b;
+}
+#endif
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 6/7] PowerPC tests: Add PC-relative tests.
2020-06-01 19:53 ` [PATCH 6/7] PowerPC tests: Add PC-relative tests Michael Meissner
@ 2020-06-01 22:45 ` will schmidt
2020-06-03 3:43 ` Michael Meissner
0 siblings, 1 reply; 32+ messages in thread
From: will schmidt @ 2020-06-01 22:45 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool, David Edelsohn
On Mon, 2020-06-01 at 15:53 -0400, Michael Meissner via Gcc-patches wrote:
> These tests make sure that PC-relative variant is generated for -mcpu=future on
> systems that support PC-relative addressing.
>
> 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
>
> * gcc.target/powerpc/prefix-pcrel-dd.c: New test.
> * gcc.target/powerpc/prefix-pcrel-df.c: New test.
> * gcc.target/powerpc/prefix-pcrel-di.c: New test.
> * gcc.target/powerpc/prefix-pcrel-hi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-kf.c: New test.
> * gcc.target/powerpc/prefix-pcrel-qi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-sd.c: New test.
> * gcc.target/powerpc/prefix-pcrel-sf.c: New test.
> * gcc.target/powerpc/prefix-pcrel-si.c: New test.
> * gcc.target/powerpc/prefix-pcrel-udi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-uhi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-uqi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-usi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-v2df.c: New test.
> * gcc.target/powerpc/prefix-pcrel.h: Include file for new tests.
> ---
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c | 16 +++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c | 13 ++++++
> .../gcc.target/powerpc/prefix-pcrel-udi.c | 13 ++++++
> .../gcc.target/powerpc/prefix-pcrel-uhi.c | 13 ++++++
> .../gcc.target/powerpc/prefix-pcrel-uqi.c | 13 ++++++
> .../gcc.target/powerpc/prefix-pcrel-usi.c | 13 ++++++
> .../gcc.target/powerpc/prefix-pcrel-v2df.c | 13 ++++++
> gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h | 52 ++++++++++++++++++++++
> 15 files changed, 237 insertions(+)
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
> create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
>
> diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
> new file mode 100644
> index 0000000..f100c24
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
> @@ -0,0 +1,13 @@
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_pcrel } */
> +/* { dg-options "-O2 -mdejagnu-cpu=future" } */
> +
> +/* Tests for prefixed instructions testing whether pc-relative prefixed
> + instructions are generated for the _Decimal64 type. */
Similar/same comment as was made in Apr. I recommend something like
"Test whether pc-relative prefixed instructions
are generated for the _Decimal64 type."
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 6/7] PowerPC tests: Add PC-relative tests.
2020-06-01 22:45 ` will schmidt
@ 2020-06-03 3:43 ` Michael Meissner
0 siblings, 0 replies; 32+ messages in thread
From: Michael Meissner @ 2020-06-03 3:43 UTC (permalink / raw)
To: will schmidt
Cc: Michael Meissner, gcc-patches, Segher Boessenkool, David Edelsohn
On Mon, Jun 01, 2020 at 05:45:34PM -0500, will schmidt wrote:
> Similar/same comment as was made in Apr. I recommend something like
>
> "Test whether pc-relative prefixed instructions
> are generated for the _Decimal64 type."
Ok, I missed that comment in April.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 7/7] PowerPC test: Add prefixed stack protect test
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (5 preceding siblings ...)
2020-06-01 19:53 ` [PATCH 6/7] PowerPC tests: Add PC-relative tests Michael Meissner
@ 2020-06-01 19:53 ` Michael Meissner
2020-06-25 17:18 ` Segher Boessenkool
2020-06-01 22:45 ` PowerPC tests for -mcpu=future will schmidt
` (2 subsequent siblings)
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-01 19:53 UTC (permalink / raw)
To: gcc-patches, Segher Boessenkool, David Edelsohn, Michael Meissner
Test that stack protection generates prefixed stack instructions if you are
using large stack frame for -mcpu=future.
2020-06-01 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-stack-protect.c: New test.
---
.../gcc.target/powerpc/prefix-stack-protect.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c b/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
new file mode 100644
index 0000000..d0d291b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-stack-protect.c
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future -fstack-protector-strong" } */
+
+/* Test that we can handle large stack frames with -fstack-protector-strong and
+ prefixed addressing. This was originally discovered when trying to build
+ glibc with -mcpu=future, and vfwprintf.c failed because it used
+ -fstack-protector-strong. */
+
+extern long foo (char *);
+
+long
+bar (void)
+{
+ char buffer[0x20000];
+ return foo (buffer) + 1;
+}
+
+/* { dg-final { scan-assembler {\mpld\M} } } */
+/* { dg-final { scan-assembler {\mpstd\M} } } */
--
1.8.3.1
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 7/7] PowerPC test: Add prefixed stack protect test
2020-06-01 19:53 ` [PATCH 7/7] PowerPC test: Add prefixed stack protect test Michael Meissner
@ 2020-06-25 17:18 ` Segher Boessenkool
2020-06-27 5:50 ` Michael Meissner
0 siblings, 1 reply; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-25 17:18 UTC (permalink / raw)
To: Michael Meissner; +Cc: gcc-patches, David Edelsohn
Hi!
On Mon, Jun 01, 2020 at 03:53:42PM -0400, Michael Meissner wrote:
> Test that stack protection generates prefixed stack instructions if you are
> using large stack frame for -mcpu=future.
>
> 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
>
> * gcc.target/powerpc/prefix-stack-protect.c: New test.
> +/* { dg-do compile } */
> +/* { dg-require-effective-target powerpc_prefixed_addr } */
Is this test necessary anymore, does -mcpu=power10 not guarantee that?
Okay for trunk with that looked at. Thanks!
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 7/7] PowerPC test: Add prefixed stack protect test
2020-06-25 17:18 ` Segher Boessenkool
@ 2020-06-27 5:50 ` Michael Meissner
2020-06-27 18:44 ` Segher Boessenkool
0 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-27 5:50 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
On Thu, Jun 25, 2020 at 12:18:42PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Jun 01, 2020 at 03:53:42PM -0400, Michael Meissner wrote:
> > Test that stack protection generates prefixed stack instructions if you are
> > using large stack frame for -mcpu=future.
> >
> > 2020-06-01 Michael Meissner <meissner@linux.ibm.com>
> >
> > * gcc.target/powerpc/prefix-stack-protect.c: New test.
>
> > +/* { dg-do compile } */
> > +/* { dg-require-effective-target powerpc_prefixed_addr } */
>
> Is this test necessary anymore, does -mcpu=power10 not guarantee that?
I believe the test is necessary to prevent regressions. As I said in the test,
we stumbled on this problem when building GLIBC with -mcpu=future/power10.
> Okay for trunk with that looked at. Thanks!
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 7/7] PowerPC test: Add prefixed stack protect test
2020-06-27 5:50 ` Michael Meissner
@ 2020-06-27 18:44 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-27 18:44 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
On Sat, Jun 27, 2020 at 01:50:48AM -0400, Michael Meissner wrote:
> On Thu, Jun 25, 2020 at 12:18:42PM -0500, Segher Boessenkool wrote:
> > > +/* { dg-do compile } */
> > > +/* { dg-require-effective-target powerpc_prefixed_addr } */
> >
> > Is this test necessary anymore, does -mcpu=power10 not guarantee that?
>
> I believe the test is necessary to prevent regressions. As I said in the test,
> we stumbled on this problem when building GLIBC with -mcpu=future/power10.
We now have
/* Enable -mprefixed by default on power10 systems. */
if (TARGET_POWER10 && (rs6000_isa_flags_explicit & OPTION_MASK_PREFIXED) == 0)
rs6000_isa_flags |= OPTION_MASK_PREFIXED;
so the testsuite can just assume it is enabled on all targets it is
supported for at all.
(The selector doesn't directly *hurt* of course, but it leads to cargo-
culting, future tests using this unneeded selector as well).
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* Re: PowerPC tests for -mcpu=future
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (6 preceding siblings ...)
2020-06-01 19:53 ` [PATCH 7/7] PowerPC test: Add prefixed stack protect test Michael Meissner
@ 2020-06-01 22:45 ` will schmidt
2020-06-04 17:03 ` [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets Michael Meissner
2020-06-04 17:05 ` [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests Michael Meissner
9 siblings, 0 replies; 32+ messages in thread
From: will schmidt @ 2020-06-01 22:45 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool, David Edelsohn
On Mon, 2020-06-01 at 15:53 -0400, Michael Meissner via Gcc-patches
wrote:
> This thread adds seven patches to add tests for the -mcpu=future code
> generation. These patches are an update to the patches I sent out in
> April.
>
> https://gcc.gnu.org/pipermail/gcc-patches/2020-April/544653.html
>
> I have done bootstrap builds with/without the patches on a little end
> power9
> box, and there were no regressions with any of the tests ran. I
> verified that
> these tests do run and succeed. Can I check them into the master
> branch?
>
One nit in #6, mentioned separately.
Otherwise this patch series lgtm.
thanks
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (7 preceding siblings ...)
2020-06-01 22:45 ` PowerPC tests for -mcpu=future will schmidt
@ 2020-06-04 17:03 ` Michael Meissner
2020-06-25 17:09 ` Segher Boessenkool
2020-06-04 17:05 ` [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests Michael Meissner
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-04 17:03 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool, David Edelsohn
[PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
Add tests to make sure for -mcpu=future that prefixed load/store instructions
are generated if the offset is larger than 16 bits. The only difference
is I reworded the comments, based on a suggestion by Will Schmidt.
2020-06-04 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-large-dd.c: New test.
* gcc.target/powerpc/prefix-large-df.c: New test.
* gcc.target/powerpc/prefix-large-di.c: New test.
* gcc.target/powerpc/prefix-large-hi.c: New test.
* gcc.target/powerpc/prefix-large-kf.c: New test.
* gcc.target/powerpc/prefix-large-qi.c: New test.
* gcc.target/powerpc/prefix-large-sd.c: New test.
* gcc.target/powerpc/prefix-large-sf.c: New test.
* gcc.target/powerpc/prefix-large-si.c: New test.
* gcc.target/powerpc/prefix-large-udi.c: New test.
* gcc.target/powerpc/prefix-large-uhi.c: New test.
* gcc.target/powerpc/prefix-large-uqi.c: New test.
* gcc.target/powerpc/prefix-large-usi.c: New test.
* gcc.target/powerpc/prefix-large-v2df.c: New test.
* gcc.target/powerpc/prefix-large.h: Include file for new tests.
---
gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-df.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-di.c | 14 ++++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c | 19 ++++++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large-si.c | 13 +++++++
.../gcc.target/powerpc/prefix-large-udi.c | 14 ++++++++
.../gcc.target/powerpc/prefix-large-uhi.c | 13 +++++++
.../gcc.target/powerpc/prefix-large-uqi.c | 13 +++++++
.../gcc.target/powerpc/prefix-large-usi.c | 13 +++++++
.../gcc.target/powerpc/prefix-large-v2df.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-large.h | 40 ++++++++++++++++++++++
15 files changed, 230 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-large.h
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
new file mode 100644
index 0000000..81cfe77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
new file mode 100644
index 0000000..b0794dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the double type. */
+
+#define TYPE double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
new file mode 100644
index 0000000..d4fcfed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-di.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the long long type. */
+
+#define TYPE long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
new file mode 100644
index 0000000..f2ebeb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the short type. */
+
+#define TYPE short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
new file mode 100644
index 0000000..f4da747
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
new file mode 100644
index 0000000..18bc5a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
new file mode 100644
index 0000000..070befa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal32 type. Note, the _Decimal32 type will not generate any
+ prefixed load or stores, because there is no prefixed load/store instruction
+ to load up a vector register as a zero extended 32-bit integer. So we count
+ the number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */
+
+
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
new file mode 100644
index 0000000..62add3c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the float type. */
+
+#define TYPE float
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
new file mode 100644
index 0000000..55ba75e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the _Decimal64 type. */
+
+#define TYPE int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
new file mode 100644
index 0000000..d800f5c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
new file mode 100644
index 0000000..e24d9cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
new file mode 100644
index 0000000..4a6df16
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
new file mode 100644
index 0000000..e79761f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
new file mode 100644
index 0000000..3e82522
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether prefixed instructions with large numeric offsets are generated
+ for the vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-large.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-large.h b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
new file mode 100644
index 0000000..07b38ae
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-large.h
@@ -0,0 +1,40 @@
+/* Common tests for prefixed instructions testing whether we can generate a
+ 34-bit offset using 1 instruction. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#ifndef CONSTANT
+#define CONSTANT 0x12480UL
+#endif
+
+#if DO_ADD
+void
+add (TYPE *p, TYPE a)
+{
+ p[CONSTANT] += a;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (TYPE *p)
+{
+ return p[CONSTANT];
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE *p, TYPE a)
+{
+ p[CONSTANT] = a;
+}
+#endif
--
1.8.3.1
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
2020-06-04 17:03 ` [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets Michael Meissner
@ 2020-06-25 17:09 ` Segher Boessenkool
2020-06-27 5:55 ` Michael Meissner
0 siblings, 1 reply; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-25 17:09 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
Hi!
On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
>
> Add tests to make sure for -mcpu=future that prefixed load/store instructions
> are generated if the offset is larger than 16 bits. The only difference
> is I reworded the comments, based on a suggestion by Will Schmidt.
That is the difference to v1? Please mark this up clearly -- there are
many examples of how you can do this, on the GCC lists even.
> +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
Is there are reason you don't have \M on pli, or is that an oversight?
Okay for trunk with that looked at, and the necessary "no future"
changes (and retesting ofc). Thanks!
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
2020-06-25 17:09 ` Segher Boessenkool
@ 2020-06-27 5:55 ` Michael Meissner
2020-06-27 18:53 ` Segher Boessenkool
0 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-27 5:55 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: Michael Meissner, gcc-patches, David Edelsohn
On Thu, Jun 25, 2020 at 12:09:41PM -0500, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> > [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
> >
> > Add tests to make sure for -mcpu=future that prefixed load/store instructions
> > are generated if the offset is larger than 16 bits. The only difference
> > is I reworded the comments, based on a suggestion by Will Schmidt.
>
> That is the difference to v1? Please mark this up clearly -- there are
> many examples of how you can do this, on the GCC lists even.
>
> > +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
>
> Is there are reason you don't have \M on pli, or is that an oversight?
Just an oversight.
> Okay for trunk with that looked at, and the necessary "no future"
> changes (and retesting ofc). Thanks!
I simplified the test to use just the instruction (PLI) that is currently
generated. I was just trying to be general to accomidate possible future code
generation changes (i.e. instead of loading up the offset with PLI, we could
potentionally do a PADDI to the base register that was loaded), but we can
change the test if/when we change the compiler.
The test in question was for loading up _Decimal32, which we don't have a
D*-form instruction that we can use, and we must always do an X-form
instruction to load up the 32-bit value into the vector register.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets
2020-06-27 5:55 ` Michael Meissner
@ 2020-06-27 18:53 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-27 18:53 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
On Sat, Jun 27, 2020 at 01:55:19AM -0400, Michael Meissner wrote:
> On Thu, Jun 25, 2020 at 12:09:41PM -0500, Segher Boessenkool wrote:
> > On Thu, Jun 04, 2020 at 01:03:51PM -0400, Michael Meissner wrote:
> > > +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */
> >
> > Is there are reason you don't have \M on pli, or is that an oversight?
>
> Just an oversight.
>
> > Okay for trunk with that looked at, and the necessary "no future"
> > changes (and retesting ofc). Thanks!
>
> I simplified the test to use just the instruction (PLI) that is currently
> generated. I was just trying to be general to accomidate possible future code
> generation changes (i.e. instead of loading up the offset with PLI, we could
> potentionally do a PADDI to the base register that was loaded), but we can
> change the test if/when we change the compiler.
That is a good idea, yes. But, please post what you committed, then?
Segher
^ permalink raw reply [flat|nested] 32+ messages in thread
* [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests.
2020-06-01 19:53 PowerPC tests for -mcpu=future Michael Meissner
` (8 preceding siblings ...)
2020-06-04 17:03 ` [PATCH 5/7, V2] PowerPC tests: Prefixed insn with large offsets Michael Meissner
@ 2020-06-04 17:05 ` Michael Meissner
2020-06-25 17:15 ` Segher Boessenkool
9 siblings, 1 reply; 32+ messages in thread
From: Michael Meissner @ 2020-06-04 17:05 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, Segher Boessenkool, David Edelsohn
[PATCH 6/7, V2] PowerPC tests: Add PC-relative tests.
These tests make sure that PC-relative variant is generated for -mcpu=future on
systems that support PC-relative addressing. The only difference
is I reworded the comments, based on a suggestion by Will Schmidt.
2020-06-03 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/prefix-pcrel-dd.c: New test.
* gcc.target/powerpc/prefix-pcrel-df.c: New test.
* gcc.target/powerpc/prefix-pcrel-di.c: New test.
* gcc.target/powerpc/prefix-pcrel-hi.c: New test.
* gcc.target/powerpc/prefix-pcrel-kf.c: New test.
* gcc.target/powerpc/prefix-pcrel-qi.c: New test.
* gcc.target/powerpc/prefix-pcrel-sd.c: New test.
* gcc.target/powerpc/prefix-pcrel-sf.c: New test.
* gcc.target/powerpc/prefix-pcrel-si.c: New test.
* gcc.target/powerpc/prefix-pcrel-udi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uhi.c: New test.
* gcc.target/powerpc/prefix-pcrel-uqi.c: New test.
* gcc.target/powerpc/prefix-pcrel-usi.c: New test.
* gcc.target/powerpc/prefix-pcrel-v2df.c: New test.
* gcc.target/powerpc/prefix-pcrel.h: Include file for new tests.
---
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c | 14 ++++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c | 15 ++++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c | 13 +++++++
.../gcc.target/powerpc/prefix-pcrel-udi.c | 14 ++++++++
.../gcc.target/powerpc/prefix-pcrel-uhi.c | 13 +++++++
.../gcc.target/powerpc/prefix-pcrel-uqi.c | 13 +++++++
.../gcc.target/powerpc/prefix-pcrel-usi.c | 13 +++++++
.../gcc.target/powerpc/prefix-pcrel-v2df.c | 13 +++++++
gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h | 41 ++++++++++++++++++++++
15 files changed, 227 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
new file mode 100644
index 0000000..bea6185
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-dd.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal64 type. */
+
+#define TYPE _Decimal64
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
new file mode 100644
index 0000000..3b232cd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ double type. */
+
+#define TYPE double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
new file mode 100644
index 0000000..5727971
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-di.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ long long type. */
+
+#define TYPE long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
new file mode 100644
index 0000000..9a1c5e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-hi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ short type. */
+
+#define TYPE short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
new file mode 100644
index 0000000..84b26ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-kf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Float128 type. */
+
+#define TYPE _Float128
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
new file mode 100644
index 0000000..05b5433
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-qi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ signed char type. */
+
+#define TYPE signed char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
new file mode 100644
index 0000000..6f21aba
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sd.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ _Decimal32 type. Note, the _Decimal32 type will not generate any prefixed
+ load or stores, because there is no prefixed load/store instruction to load
+ up a vector register as a zero extended 32-bit integer. So we count the
+ number of load addresses that are generated. */
+
+#define TYPE _Decimal32
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpla\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
new file mode 100644
index 0000000..9fc5f91
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-sf.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ float type. */
+
+#define TYPE float
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
new file mode 100644
index 0000000..34151bd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-si.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ int type. */
+
+#define TYPE int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
new file mode 100644
index 0000000..75962ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-udi.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned long long type. */
+
+#define TYPE unsigned long long
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
new file mode 100644
index 0000000..07bee42
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uhi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned short type. */
+
+#define TYPE unsigned short
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
new file mode 100644
index 0000000..c365a77
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-uqi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned char type. */
+
+#define TYPE unsigned char
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
new file mode 100644
index 0000000..46bc286
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-usi.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ unsigned int type. */
+
+#define TYPE unsigned int
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
new file mode 100644
index 0000000..124cdfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel-v2df.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=future" } */
+
+/* Tests whether pc-relative prefixed instructions are generated for the
+ vector double type. */
+
+#define TYPE vector double
+
+#include "prefix-pcrel.h"
+
+/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
new file mode 100644
index 0000000..26175dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/prefix-pcrel.h
@@ -0,0 +1,41 @@
+/* Common tests for prefixed instructions testing whether pc-relative prefixed
+ instructions are generated for each type. */
+
+#ifndef TYPE
+#define TYPE unsigned int
+#endif
+
+static TYPE a;
+
+/* Make sure a is not optimized away. */
+TYPE *p = &a;
+
+#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET)
+#define DO_ADD 1
+#define DO_VALUE 1
+#define DO_SET 1
+#endif
+
+#if DO_ADD
+void
+add (TYPE b)
+{
+ a += b;
+}
+#endif
+
+#if DO_VALUE
+TYPE
+value (void)
+{
+ return a;
+}
+#endif
+
+#if DO_SET
+void
+set (TYPE b)
+{
+ a = b;
+}
+#endif
--
1.8.3.1
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
^ permalink raw reply [flat|nested] 32+ messages in thread* Re: [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests.
2020-06-04 17:05 ` [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests Michael Meissner
@ 2020-06-25 17:15 ` Segher Boessenkool
0 siblings, 0 replies; 32+ messages in thread
From: Segher Boessenkool @ 2020-06-25 17:15 UTC (permalink / raw)
To: Michael Meissner, gcc-patches, David Edelsohn
On Thu, Jun 04, 2020 at 01:05:12PM -0400, Michael Meissner wrote:
> [PATCH 6/7, V2] PowerPC tests: Add PC-relative tests.
>
> These tests make sure that PC-relative variant is generated for -mcpu=future on
> systems that support PC-relative addressing. The only difference
> is I reworded the comments, based on a suggestion by Will Schmidt.
>
> 2020-06-03 Michael Meissner <meissner@linux.ibm.com>
>
> * gcc.target/powerpc/prefix-pcrel-dd.c: New test.
> * gcc.target/powerpc/prefix-pcrel-df.c: New test.
> * gcc.target/powerpc/prefix-pcrel-di.c: New test.
> * gcc.target/powerpc/prefix-pcrel-hi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-kf.c: New test.
> * gcc.target/powerpc/prefix-pcrel-qi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-sd.c: New test.
> * gcc.target/powerpc/prefix-pcrel-sf.c: New test.
> * gcc.target/powerpc/prefix-pcrel-si.c: New test.
> * gcc.target/powerpc/prefix-pcrel-udi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-uhi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-uqi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-usi.c: New test.
> * gcc.target/powerpc/prefix-pcrel-v2df.c: New test.
> * gcc.target/powerpc/prefix-pcrel.h: Include file for new tests.
OKay for trunk like 5. Thank you!
Segher
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