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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Andrea Corallo <andrea.corallo@arm.com>
Cc: gcc-patches@gcc.gnu.org, nd@arm.com,
	Richard Earnshaw <richard.earnshaw@arm.com>
Subject: Re: [PATCH 1/2] Add new RTX instruction class FILLER_INSN
Date: Wed, 19 Aug 2020 11:51:36 -0500	[thread overview]
Message-ID: <20200819165136.GR28786@gate.crashing.org> (raw)
In-Reply-To: <gkry2nbyiiu.fsf@arm.com>

[ Please don't post new patch series as replies to old ]

On Wed, Jul 22, 2020 at 12:02:33PM +0200, Andrea Corallo wrote:
> This first patch implements the addition of a new RTX instruction class
> FILLER_INSN, which has been white listed to allow placement of NOPs
> outside of a basic block.  This is to allow padding after unconditional
> branches.  This is favorable so that any performance gained from
> diluting branches is not paid straight back via excessive eating of
> nops.
> 
> It was deemed that a new RTX class was less invasive than modifying
> behavior in regards to standard UNSPEC nops.

Deemed, by whom?  There are several people very against it, too.  You
need to modify only one simple behaviour (maybe in a handful of places),
making a new RTX class for that is excessive.

> 	* cfgbuild.c (inside_basic_block_p): Handle FILLER_INSN.
> 	* cfgrtl.c (rtl_verify_bb_layout): Whitelist FILLER_INSN outside
> 	basic blocks.
> 	* coretypes.h: New rtx class.

coretypes.h is not a new RTX class?  :-)  Maybe:

	* coretypes.h (rtx_filler_insn): New struct.

> @@ -3033,7 +3034,20 @@ rtl_verify_bb_layout (void)
>  	      break;
>  
>  	    default:
> -	      fatal_insn ("insn outside basic block", x);
> +	      /* Allow nops after branches, via FILLER_INSN.  */
> +	      bool fail = true;
> +	      subrtx_iterator::array_type array;
> +	      FOR_EACH_SUBRTX (iter, array, x, ALL)
> +		{
> +		  const_rtx rtx = *iter;
> +		  if (GET_CODE (rtx) == FILLER_INSN)
> +		    {
> +		      fail = false;
> +		      break;
> +		    }
> +		}
> +	      if (fail)
> +		fatal_insn ("insn outside basic block", x);
>  	    }
>  	}

It wouldn't be hard to allow some existing RTL here.  Maybe something
with CODE_FOR_filler_nop or similar (after you recog () it).

It still allows anything after leading filler insns, btw; you could get
rid of the "fail" variable altogether, just call fatal_insn as soon as
you see some unexpected RTX code.

> +  rtx_insn* i = make_insn_raw (pattern);

rtx_insn *i = ...


Segher

  parent reply	other threads:[~2020-08-19 16:51 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-22 10:02 Andrea Corallo
2020-07-22 10:09 ` [PATCH 2/2] Aarch64: Add branch diluter pass Andrea Corallo
2020-07-22 10:39   ` Andrew Pinski
2020-07-22 13:53     ` Andrea Corallo
2020-07-22 16:43       ` Segher Boessenkool
2020-07-22 19:45         ` Andrea Corallo
2020-07-23 22:47           ` Segher Boessenkool
2020-07-24  7:01             ` Andrea Corallo
2020-07-24 11:53               ` Segher Boessenkool
2020-07-24 13:21                 ` Andrea Corallo
2020-07-24 22:09   ` Segher Boessenkool
2020-07-28 18:55     ` Andrea Corallo
2020-07-28 22:07       ` Segher Boessenkool
2020-07-22 12:24 ` [PATCH 1/2] Add new RTX instruction class FILLER_INSN Richard Biener
2020-07-22 13:16   ` Richard Earnshaw (lists)
2020-07-22 14:51   ` Andrea Corallo
2020-07-22 18:41 ` Joseph Myers
2020-07-24 21:18 ` Segher Boessenkool
2020-07-26 18:19   ` Eric Botcazou
2020-07-28 19:29   ` Andrea Corallo
2020-08-19  9:13   ` Andrea Corallo
2020-08-19 10:52     ` Richard Sandiford
2020-08-19 17:28     ` Segher Boessenkool
2020-08-19 16:51 ` Segher Boessenkool [this message]
2020-08-19 17:47   ` Andrea Corallo

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