From: Michael Meissner <meissner@linux.ibm.com>
To: Michael Meissner <meissner@linux.ibm.com>,
gcc-patches@gcc.gnu.org,
Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>,
Bill Schmidt <wschmidt@linux.ibm.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: [PATCH 3/3] power10: Add tests for PCREL_OPT.
Date: Sat, 5 Sep 2020 00:36:37 -0400 [thread overview]
Message-ID: <20200905043637.GC18837@ibm-toto.the-meissners.org> (raw)
In-Reply-To: <20200905042756.GA15702@ibm-toto.the-meissners.org>
power10: Add tests for PCREL_OPT.
This patch add the PCREL_OPT tests for the previous two patches.
I have built compilers with and without these set of 3 patches doing a
bootstrap build and make check. There were no regressions, and the new tests
passed. Can I check these patches into the master branch for GCC? Because
this is new functionality, I do not intend to back port these patches to GCC 10
at this time.
gcc/testsuite/
2020-09-04 Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/pcrel-opt-inc-di.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-df.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-di.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-hi.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-qi.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-sf.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-si.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-ld-vector.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-df.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-di.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-hi.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-qi.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-sf.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-si.c: New PCREL_OPT test.
* gcc.target/powerpc/pcrel-opt-st-vector.c: New PCREL_OPT test.
---
.../gcc.target/powerpc/pcrel-opt-inc-di.c | 18 ++++++++
.../gcc.target/powerpc/pcrel-opt-ld-df.c | 36 ++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-di.c | 43 +++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-hi.c | 42 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-qi.c | 42 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-sf.c | 42 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-si.c | 41 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-ld-vector.c | 36 ++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-df.c | 36 ++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-di.c | 43 +++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-hi.c | 42 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-qi.c | 42 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-sf.c | 36 ++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-si.c | 41 ++++++++++++++++++
.../gcc.target/powerpc/pcrel-opt-st-vector.c | 36 ++++++++++++++++
15 files changed, 576 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-inc-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-vector.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-df.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-di.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-hi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-qi.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-sf.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-si.c
create mode 100644 gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-vector.c
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-inc-di.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-inc-di.c
new file mode 100644
index 00000000000..f165068e2be
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-inc-di.c
@@ -0,0 +1,18 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE unsigned int
+
+/* Test whether using an external variable twice (doing an increment) prevents
+ the PCREL_OPT optimization. */
+extern TYPE ext;
+
+void
+inc (void)
+{
+ ext++; /* No PCREL_OPT (uses address twice). */
+}
+
+/* { dg-final { scan-assembler-not "R_PPC64_PCREL_OPT" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-df.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-df.c
new file mode 100644
index 00000000000..d35862fcb6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-df.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE double
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ double. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-di.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-di.c
new file mode 100644
index 00000000000..12b51ab2e67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-di.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE long long
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for long
+ long. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+double
+get_double (void)
+{
+ return (double) ext[0]; /* PCREL_OPT relocation. */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-hi.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-hi.c
new file mode 100644
index 00000000000..4143aeb7371
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-hi.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE unsigned short
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for unsigned
+ short. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+double
+get_double (void)
+{
+ return (double) ext[0]; /* No PCREL_OPT (LXSIHZX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-qi.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-qi.c
new file mode 100644
index 00000000000..30d3236f95c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-qi.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE unsigned char
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for unsigned
+ char. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+double
+get_double (void)
+{
+ return (double) ext[0]; /* No PCREL_OPT (LXSIBZX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-sf.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-sf.c
new file mode 100644
index 00000000000..9d1e2a1956f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-sf.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE float
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ float. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+double
+get_double (void)
+{
+ return (double) ext[0]; /* PCREL_OPT relocation. */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-si.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-si.c
new file mode 100644
index 00000000000..17be6fa1778
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-si.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE int
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for int. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+double
+get_double (void)
+{
+ return (double) ext[0]; /* No PCREL_OPT (LFIWAX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-vector.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-vector.c
new file mode 100644
index 00000000000..8c12aea5acd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-ld-vector.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE vector double
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ vector double. */
+extern TYPE ext[];
+
+TYPE
+get (void)
+{
+ return ext[0]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get2 (void)
+{
+ return ext[2]; /* PCREL_OPT relocation. */
+}
+
+TYPE
+get_large (void)
+{
+ return ext[LARGE]; /* No PCREL_OPT (load is prefixed). */
+}
+
+TYPE
+get_variable (unsigned long n)
+{
+ return ext[n]; /* No PCREL_OPT (load is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-df.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-df.c
new file mode 100644
index 00000000000..d795d35d8de
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-df.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE double
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ double. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-di.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-di.c
new file mode 100644
index 00000000000..a065d83f6f2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-di.c
@@ -0,0 +1,43 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE long long
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for long
+ long. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+void
+store_double (double a)
+{
+ ext[0] = (TYPE) a; /* PCREL_OPT relocation. */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-hi.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-hi.c
new file mode 100644
index 00000000000..8822e767dfe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-hi.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE unsigned short
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for unsigned
+ short. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+void
+store_double (double a)
+{
+ ext[0] = (TYPE) a; /* No PCREL_OPT (STXIHZX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-qi.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-qi.c
new file mode 100644
index 00000000000..2f756833717
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-qi.c
@@ -0,0 +1,42 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE unsigned char
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for unsigned
+ char. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+void
+store_double (double a)
+{
+ ext[0] = (TYPE) a; /* No PCREL_OPT (STXIBZX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-sf.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-sf.c
new file mode 100644
index 00000000000..3dd88aad856
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-sf.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE float
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ float. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-si.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-si.c
new file mode 100644
index 00000000000..78dc8120efe
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-si.c
@@ -0,0 +1,41 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE int
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for int. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+void
+store_double (double a)
+{
+ ext[0] = (TYPE) a; /* No PCREL_OPT (STFIWX is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-vector.c b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-vector.c
new file mode 100644
index 00000000000..2c602eb3103
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pcrel-opt-st-vector.c
@@ -0,0 +1,36 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_pcrel } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+
+#define TYPE vector double
+#define LARGE 0x20000
+
+/* Test whether we get the right number of PCREL_OPT optimizations for
+ vector double. */
+extern TYPE ext[];
+
+void
+store (TYPE a)
+{
+ ext[0] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store2 (TYPE a)
+{
+ ext[2] = a; /* PCREL_OPT relocation. */
+}
+
+void
+store_large (TYPE a)
+{
+ ext[LARGE] = a; /* No PCREL_OPT (store is prefixed). */
+}
+
+void
+store_variable (TYPE a, unsigned long n)
+{
+ ext[n] = a; /* No PCREL_OPT (store is indexed). */
+}
+
+/* { dg-final { scan-assembler-times "R_PPC64_PCREL_OPT" 2 } } */
--
2.22.0
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
next prev parent reply other threads:[~2020-09-05 4:36 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-05 4:27 [PATCH 0/3] Power10 PCREL_OPT support (September 5th 2020) Michael Meissner
2020-09-05 4:31 ` [PATCH 1/3] power10: Add PCREL_OPT load support Michael Meissner
2020-09-05 4:35 ` [PATCH 2/3] power10: Add PCREL_OPT store support Michael Meissner
2020-09-05 4:36 ` Michael Meissner [this message]
2020-09-05 15:20 ` [PATCH 0/3] Power10 PCREL_OPT support (September 5th 2020) Michael Meissner
2020-09-22 3:21 ` Ping: " Michael Meissner
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