From: Segher Boessenkool <segher@kernel.crashing.org>
To: Richard Biener <richard.guenther@gmail.com>
Cc: luoxhu <luoxhu@linux.ibm.com>,
GCC Patches <gcc-patches@gcc.gnu.org>,
David Edelsohn <dje.gcc@gmail.com>,
Bill Schmidt <wschmidt@linux.ibm.com>,
linkw@gcc.gnu.org
Subject: Re: [PATCH v2] rs6000: Expand vec_insert in expander instead of gimple [PR79251]
Date: Tue, 15 Sep 2020 11:16:26 -0500 [thread overview]
Message-ID: <20200915161626.GN28786@gate.crashing.org> (raw)
In-Reply-To: <CAFiYyc3a7v-3GL0rHijpautPiwq1z2qJuUWN7FDQEMOyp=yvJg@mail.gmail.com>
On Tue, Sep 15, 2020 at 08:51:09AM +0200, Richard Biener wrote:
> On Tue, Sep 15, 2020 at 5:56 AM luoxhu <luoxhu@linux.ibm.com> wrote:
> > > u[n % 4] = i;
> > >
> > > I guess. Is the % 4 mandated by the vec_insert semantics btw?
(As an aside -- please use "& 3" instead: that works fine if n is signed
as well, but modulo doesn't. Maybe that is in the patch already, I
didn't check, sorry.)
> note this is why I asked about the actual CPU instruction - as I read
> Seghers mail
> the instruction modifies a vector register, not memory.
But note that the builtin is not the same as the machine instruction --
here there shouldn't be a difference if compiling for a new enough ISA,
but the builtin is available on anything with at least AltiVec.
Segher
next prev parent reply other threads:[~2020-09-15 16:17 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-31 9:06 [PATCH] " Xiong Hu Luo
2020-08-31 12:43 ` Richard Biener
2020-08-31 16:47 ` will schmidt
2020-09-01 11:43 ` luoxhu
2020-08-31 17:04 ` Segher Boessenkool
2020-09-01 8:09 ` luoxhu
2020-09-01 13:07 ` Richard Biener
2020-09-02 9:26 ` luoxhu
2020-09-02 9:30 ` Richard Biener
2020-09-03 9:20 ` luoxhu
2020-09-03 10:29 ` Richard Biener
2020-09-04 6:16 ` luoxhu
2020-09-04 6:38 ` luoxhu
2020-09-04 7:19 ` Richard Biener
2020-09-04 7:23 ` Richard Biener
2020-09-04 9:18 ` luoxhu
2020-09-04 10:23 ` Segher Boessenkool
2020-09-07 5:43 ` [PATCH v2] " luoxhu
2020-09-07 11:57 ` Richard Biener
2020-09-08 8:11 ` luoxhu
2020-09-08 8:26 ` Richard Biener
2020-09-09 1:47 ` luoxhu
2020-09-09 7:30 ` Richard Biener
2020-09-09 13:47 ` Segher Boessenkool
2020-09-09 14:28 ` Richard Biener
2020-09-09 16:00 ` Segher Boessenkool
2020-09-10 10:08 ` Richard Biener
2020-09-14 8:05 ` luoxhu
2020-09-14 9:47 ` Richard Biener
2020-09-14 10:47 ` Richard Sandiford
2020-09-14 11:22 ` Richard Biener
2020-09-14 11:49 ` Richard Sandiford
2020-09-14 21:06 ` Segher Boessenkool
2020-09-14 20:59 ` Segher Boessenkool
2020-09-15 3:56 ` luoxhu
2020-09-15 6:51 ` Richard Biener
2020-09-15 16:16 ` Segher Boessenkool [this message]
2020-09-16 8:31 ` Richard Biener
2020-09-16 11:11 ` Segher Boessenkool
2020-09-16 6:15 ` luoxhu
2020-09-16 8:41 ` Richard Biener
2020-09-14 20:21 ` Segher Boessenkool
2020-09-01 14:02 ` [PATCH] " Segher Boessenkool
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