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Date: Tue, 15 Sep 2020 11:16:26 -0500
From: Segher Boessenkool <segher@kernel.crashing.org>
To: Richard Biener <richard.guenther@gmail.com>
Cc: luoxhu <luoxhu@linux.ibm.com>, GCC Patches <gcc-patches@gcc.gnu.org>,
 David Edelsohn <dje.gcc@gmail.com>,
 Bill Schmidt <wschmidt@linux.ibm.com>, linkw@gcc.gnu.org
Subject: Re: [PATCH v2] rs6000: Expand vec_insert in expander instead of
 gimple [PR79251]
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On Tue, Sep 15, 2020 at 08:51:09AM +0200, Richard Biener wrote:
> On Tue, Sep 15, 2020 at 5:56 AM luoxhu <luoxhu@linux.ibm.com> wrote:
> > >     u[n % 4] = i;
> > >
> > > I guess.  Is the % 4 mandated by the vec_insert semantics btw?

(As an aside -- please use "& 3" instead: that works fine if n is signed
as well, but modulo doesn't.  Maybe that is in the patch already, I
didn't check, sorry.)

> note this is why I asked about the actual CPU instruction - as I read
> Seghers mail
> the instruction modifies a vector register, not memory.

But note that the builtin is not the same as the machine instruction --
here there shouldn't be a difference if compiling for a new enough ISA,
but the builtin is available on anything with at least AltiVec.


Segher