From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by sourceware.org (Postfix) with ESMTPS id 0B9C53851C2A for ; Wed, 7 Oct 2020 22:58:38 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0B9C53851C2A Received: by mail-pg1-x534.google.com with SMTP id 7so2556730pgm.11 for ; Wed, 07 Oct 2020 15:58:38 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0vAPiy+SjU5gBNGW+eMw8ff4kmLINq7KRXrAQ3wywOw=; b=nLe9/j5m+9z0g0hz8sL41YV/5QndGchGLZdl6YyuC3f1OV9/HNep1zRwfNQp2x7dcv V+trDPyQlT/DfUh1WuG0upCJAsg8Hkq0P7fvyKW60mUs0QPJHBYkTttiN+JOvYoLZeAp n+Tg2lD04p+Ra+nJ/TOociLFwKB1e5DVMGn0ZYScC3q8ZkfrTGkjyYFDo1jTDWyFy2ll v2IcWNivLb06M/5FwE2eLiU54X31AfvSPFYBBakHPHsT71oiNEsNpHvE1s7bu9kOo02m BnePSXFgT/8h0G+U2t1uUGc2iRZSbmZKh8niidOAh4UHq0UyRLmysGdJIHiQTzsloeuZ 2/0A== X-Gm-Message-State: AOAM532VK8ALNy77i+e/xjCbI8ihXhmvhU5Dl0x1t+v/FcbyeYh1ZbBh agv0WSl9oCO5WjSmO2oUYMxYtRjqag+MvQ== X-Google-Smtp-Source: ABdhPJyPLbrtJg0VHvqwk1zkdIxWoK5ir1T7a0AifkL0HMIePJHW2sPx0c2fQ/LSPwshYNnvR3JHdw== X-Received: by 2002:a63:584e:: with SMTP id i14mr2690907pgm.329.1602111516742; Wed, 07 Oct 2020 15:58:36 -0700 (PDT) Received: from bubble.grove.modra.org ([2406:3400:51d:8cc0:e872:ea73:2f18:2dba]) by smtp.gmail.com with ESMTPSA id u15sm4451348pfm.61.2020.10.07.15.58.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Oct 2020 15:58:36 -0700 (PDT) From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, Alan Modra Subject: [PATCH 2/8] [RS6000] rs6000_rtx_costs for AND Date: Thu, 8 Oct 2020 09:27:54 +1030 Message-Id: <20201007225800.9536-3-amodra@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201007225800.9536-1-amodra@gmail.com> References: <20201007225800.9536-1-amodra@gmail.com> X-Spam-Status: No, score=-10.0 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Oct 2020 22:58:39 -0000 The existing "case AND" in this function is not sufficient for optabs.c:avoid_expensive_constant usage, where the AND is passed in outer_code. We'd like to cost AND of rs6000_is_valid_and_mask or rs6000_is_valid_2insn_and variety there, so that those masks aren't seen as expensive (ie. better to load to a reg then AND). * config/rs6000/rs6000.c (rs6000_rtx_costs): Combine CONST_INT AND handling with IOR/XOR. Move costing for AND with rs6000_is_valid_and_mask or rs6000_is_valid_2insn_and to CONST_INT. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 97180bb3819..e870ba0039a 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -21264,16 +21264,13 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, || outer_code == MINUS) && (satisfies_constraint_I (x) || satisfies_constraint_L (x))) - || (outer_code == AND - && (satisfies_constraint_K (x) - || (mode == SImode - ? satisfies_constraint_L (x) - : satisfies_constraint_J (x)))) - || ((outer_code == IOR || outer_code == XOR) + || ((outer_code == AND || outer_code == IOR || outer_code == XOR) && (satisfies_constraint_K (x) || (mode == SImode ? satisfies_constraint_L (x) : satisfies_constraint_J (x)))) + || (outer_code == AND + && rs6000_is_valid_and_mask (x, mode)) || outer_code == ASHIFT || outer_code == ASHIFTRT || outer_code == LSHIFTRT @@ -21310,7 +21307,9 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, || outer_code == IOR || outer_code == XOR) && (INTVAL (x) - & ~ (unsigned HOST_WIDE_INT) 0xffffffff) == 0)) + & ~ (unsigned HOST_WIDE_INT) 0xffffffff) == 0) + || (outer_code == AND + && rs6000_is_valid_2insn_and (x, mode))) { *total = COSTS_N_INSNS (1); return true; @@ -21448,26 +21447,6 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, *total += COSTS_N_INSNS (1); return true; } - - /* rotate-and-mask (no rotate), andi., andis.: 1 insn. */ - HOST_WIDE_INT val = INTVAL (XEXP (x, 1)); - if (rs6000_is_valid_and_mask (XEXP (x, 1), mode) - || (val & 0xffff) == val - || (val & 0xffff0000) == val - || ((val & 0xffff) == 0 && mode == SImode)) - { - *total = rtx_cost (left, mode, AND, 0, speed); - *total += COSTS_N_INSNS (1); - return true; - } - - /* 2 insns. */ - if (rs6000_is_valid_2insn_and (XEXP (x, 1), mode)) - { - *total = rtx_cost (left, mode, AND, 0, speed); - *total += COSTS_N_INSNS (2); - return true; - } } *total = COSTS_N_INSNS (1);