From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf1-x431.google.com (mail-pf1-x431.google.com [IPv6:2607:f8b0:4864:20::431]) by sourceware.org (Postfix) with ESMTPS id 6B61B386F83E for ; Wed, 7 Oct 2020 22:58:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 6B61B386F83E Received: by mail-pf1-x431.google.com with SMTP id 144so2368558pfb.4 for ; Wed, 07 Oct 2020 15:58:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qkXPA+TpwA2OkiNnehumLEvw3Q/fJtYqrfDq5PqfT7U=; b=OmG2sgrdIj2dl//OHHgh8mBSZ+jhXDEZ6T36U9CCjRrClg9kClZ0biZ895hZ7G3wHI CnUbVODg3+vXXiU+NRaGymt6aLFUVItzYQcvjcFdgSAGL/7S2FJYSEzDTCCFjzIXAkHg X0I8mPlO9OVWqPRjSD4GwgwYCjMoHlaJ/Sx6Se7Aqz7zkpQ95/ZUA9aIQjdISk6Jc2q+ WNk+VebxHLx3qr70p27dyvcNVpcLdn20dnrkna3EIg2F7Pf0pu6yKlwUP6UU8xA+JAMe 8npM33AwxZlYhV3UG8Hs51QOqv5F/Yziz+sdH0ik9ZLJ0CPybv4nJvmh3MOPpjLrU2Cf aPQg== X-Gm-Message-State: AOAM532RRdnqU0+icYZLNqdlkrMEODR1hLzYjcZ+Z/4lGcec4UUNUd8H 0XKuVJhUrZMj9ncjbotEUXDmVfRb7/98KQ== X-Google-Smtp-Source: ABdhPJzFTACB/aQxGX40HjoOlZY9T/ucwH2igYAyYgnd+h9LCEYWFkyMECoYpXZs31Rj9Ap389pmWQ== X-Received: by 2002:a17:90b:408b:: with SMTP id jb11mr5088462pjb.164.1602111525048; Wed, 07 Oct 2020 15:58:45 -0700 (PDT) Received: from bubble.grove.modra.org ([2406:3400:51d:8cc0:e872:ea73:2f18:2dba]) by smtp.gmail.com with ESMTPSA id u15sm4451348pfm.61.2020.10.07.15.58.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Oct 2020 15:58:44 -0700 (PDT) From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: segher@kernel.crashing.org, Alan Modra Subject: [PATCH 5/8] [RS6000] rs6000_rtx_costs cost IOR Date: Thu, 8 Oct 2020 09:27:57 +1030 Message-Id: <20201007225800.9536-6-amodra@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201007225800.9536-1-amodra@gmail.com> References: <20201007225800.9536-1-amodra@gmail.com> X-Spam-Status: No, score=-10.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 07 Oct 2020 22:58:47 -0000 * config/rs6000/rs6000.c (rotate_insert_cost): New function. (rs6000_rtx_costs): Cost IOR. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 383d2901c9f..15a806fe307 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -21206,6 +21206,91 @@ rs6000_cannot_copy_insn_p (rtx_insn *insn) && get_attr_cannot_copy (insn); } +/* Handle rtx_costs for scalar integer rotate and insert insns. */ + +static bool +rotate_insert_cost (rtx left, rtx right, machine_mode mode, bool speed, + int *total) +{ + if (GET_CODE (right) == AND + && CONST_INT_P (XEXP (right, 1)) + && UINTVAL (XEXP (left, 1)) + UINTVAL (XEXP (right, 1)) + 1 == 0) + { + rtx leftop = XEXP (left, 0); + rtx rightop = XEXP (right, 0); + + /* rotlsi3_insert_5. */ + if (REG_P (leftop) + && REG_P (rightop) + && mode == SImode + && UINTVAL (XEXP (left, 1)) != 0 + && UINTVAL (XEXP (right, 1)) != 0 + && rs6000_is_valid_mask (XEXP (left, 1), NULL, NULL, mode)) + return true; + /* rotldi3_insert_6. */ + if (REG_P (leftop) + && REG_P (rightop) + && mode == DImode + && exact_log2 (-UINTVAL (XEXP (left, 1))) > 0) + return true; + /* rotldi3_insert_7. */ + if (REG_P (leftop) + && REG_P (rightop) + && mode == DImode + && exact_log2 (-UINTVAL (XEXP (right, 1))) > 0) + return true; + + rtx mask = 0; + rtx shift = leftop; + rtx_code shift_code = GET_CODE (shift); + /* rotl3_insert. */ + if (shift_code == ROTATE + || shift_code == ASHIFT + || shift_code == LSHIFTRT) + mask = right; + else + { + shift = rightop; + shift_code = GET_CODE (shift); + /* rotl3_insert_2. */ + if (shift_code == ROTATE + || shift_code == ASHIFT + || shift_code == LSHIFTRT) + mask = left; + } + if (mask + && CONST_INT_P (XEXP (shift, 1)) + && rs6000_is_valid_insert_mask (XEXP (mask, 1), shift, mode)) + { + *total += rtx_cost (XEXP (shift, 0), mode, shift_code, 0, speed); + *total += rtx_cost (XEXP (mask, 0), mode, AND, 0, speed); + return true; + } + } + /* rotl3_insert_3. */ + if (GET_CODE (right) == ASHIFT + && CONST_INT_P (XEXP (right, 1)) + && (INTVAL (XEXP (right, 1)) + == exact_log2 (UINTVAL (XEXP (left, 1)) + 1))) + { + *total += rtx_cost (XEXP (left, 0), mode, AND, 0, speed); + *total += rtx_cost (XEXP (right, 0), mode, ASHIFT, 0, speed); + return true; + } + /* rotl3_insert_4. */ + if (GET_CODE (right) == LSHIFTRT + && CONST_INT_P (XEXP (right, 1)) + && mode == SImode + && (INTVAL (XEXP (right, 1)) + + exact_log2 (-UINTVAL (XEXP (left, 1)))) == 32) + { + *total += rtx_cost (XEXP (left, 0), mode, AND, 0, speed); + *total += rtx_cost (XEXP (right, 0), mode, LSHIFTRT, 0, speed); + return true; + } + return false; +} + /* Compute a (partial) cost for rtx X. Return true if the complete cost has been computed, and false if subexpressions should be scanned. In either case, *TOTAL contains the cost result. @@ -21253,7 +21338,7 @@ static bool rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed) { - rtx right; + rtx left, right; int code = GET_CODE (x); switch (code) @@ -21435,7 +21520,7 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, right = XEXP (x, 1); if (CONST_INT_P (right)) { - rtx left = XEXP (x, 0); + left = XEXP (x, 0); rtx_code left_code = GET_CODE (left); /* rotate-and-mask: 1 insn. */ @@ -21452,9 +21537,16 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, return false; case IOR: - /* FIXME */ *total = COSTS_N_INSNS (1); - return true; + left = XEXP (x, 0); + if (GET_CODE (left) == AND + && CONST_INT_P (XEXP (left, 1))) + { + right = XEXP (x, 1); + if (rotate_insert_cost (left, right, mode, speed, total)) + return true; + } + return false; case CLZ: case XOR: