From: Xionghu Luo <luoxhu@linux.ibm.com>
To: gcc-patches@gcc.gnu.org
Cc: segher@kernel.crashing.org, dje.gcc@gmail.com,
wschmidt@linux.ibm.com, guojiufu@linux.ibm.com,
linkw@gcc.gnu.org, Xionghu Luo <luoxhu@linux.ibm.com>
Subject: [PATCH 4/4] rs6000: Update testcases' instruction count
Date: Sat, 10 Oct 2020 03:08:25 -0500 [thread overview]
Message-ID: <20201010080825.3599892-5-luoxhu@linux.ibm.com> (raw)
In-Reply-To: <20201010080825.3599892-1-luoxhu@linux.ibm.com>
gcc/testsuite/ChangeLog:
2020-10-10 Xionghu Luo <luoxhu@linux.ibm.com>
* gcc.target/powerpc/fold-vec-insert-char-p8.c: Adjust
instruction counts.
* gcc.target/powerpc/fold-vec-insert-char-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-double.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-float-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-float-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-int-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-int-p9.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-longlong.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-short-p8.c: Likewise.
* gcc.target/powerpc/fold-vec-insert-short-p9.c: Likewise.
* gcc.target/powerpc/vsx-builtin-7.c: Likewise.
---
.../gcc.target/powerpc/fold-vec-insert-char-p8.c | 11 ++++++-----
.../gcc.target/powerpc/fold-vec-insert-char-p9.c | 12 ++++++------
.../gcc.target/powerpc/fold-vec-insert-double.c | 11 ++++++++---
.../gcc.target/powerpc/fold-vec-insert-float-p8.c | 6 +++---
.../gcc.target/powerpc/fold-vec-insert-float-p9.c | 10 +++++-----
.../gcc.target/powerpc/fold-vec-insert-int-p8.c | 9 +++++----
.../gcc.target/powerpc/fold-vec-insert-int-p9.c | 11 +++++------
.../gcc.target/powerpc/fold-vec-insert-longlong.c | 10 +++-------
.../gcc.target/powerpc/fold-vec-insert-short-p8.c | 9 +++++----
.../gcc.target/powerpc/fold-vec-insert-short-p9.c | 8 ++++----
gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c | 4 ++--
11 files changed, 52 insertions(+), 49 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c
index b13c8ca19c7..1ad23de99a9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p8.c
@@ -44,15 +44,16 @@ vector unsigned char testuu_cst (unsigned char x, vector unsigned char v)
return vec_insert (x, v, 12);
}
-/* one store per _var test */
-/* { dg-final { scan-assembler-times {\mstvx\M|\mstxvw4x\M} 4 } } */
+/* no store per _var test */
+/* { dg-final { scan-assembler-times {\mstvx\M|\mstxvw4x\M} 0 } } */
/* one store-byte per test */
-/* { dg-final { scan-assembler-times {\mstb\M} 8 } } */
+/* { dg-final { scan-assembler-times {\mstb\M} 4 } } */
/* one load per test */
-/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 8 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 8 { target le } } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 4 { target be } } } */
/* one lvebx per _cst test.*/
/* { dg-final { scan-assembler-times {\mlvebx\M} 4 } } */
/* one vperm per _cst test.*/
-/* { dg-final { scan-assembler-times {\mvperm\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 12 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
index 16432289d68..400caa31bb4 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
@@ -44,13 +44,13 @@ vector unsigned char testuu_cst (unsigned char x, vector unsigned char v)
return vec_insert (x, v, 12);
}
-/* load immediate, add, store, stb, load variable test. */
-/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mstb\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mlvebx\M|\mlxv\M|\mlvx\M} 4 { target lp64} } } */
+/* no store per _var test. */
+/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstb\M} 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mlvebx\M|\mlxv\M|\mlvx\M} 0 { target lp64} } } */
/* an insert and a move per constant test. */
-/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mvinsertb\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mvinsertb\M} 8 { target lp64 } } } */
/* -m32 codegen. */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 4 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c
index 435d28d5420..842fe9bbcad 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-double.c
@@ -23,7 +23,12 @@ testd_cst (double d, vector double vd)
/* { dg-final { scan-assembler {\mxxpermdi\M} } } */
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 1 } } */
+
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 1 { target { ! has_arch_pwr8 } } } } */
+/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 1 { target { ! has_arch_pwr8 } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 1 { target { ! has_arch_pwr8 } } } } */
+
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxv\M|\mstvx\M} 0 { target { has_arch_pwr8 } } } } */
+/* { dg-final { scan-assembler-times {\mstfdx\M|\mstfd\M} 0 { target { has_arch_pwr8 } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 { target { has_arch_pwr8 } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
index 7682aea8165..6a3b1b4c39e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
@@ -19,12 +19,12 @@ testf_cst (float f, vector float vf)
return vec_insert (f, vf, 12);
}
-/* { dg-final { scan-assembler-times {\mstvx\M|\mstxv\M|\mstxvd2x\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mstvx\M|\mstxv\M|\mstxvd2x\M} 0 } } */
/* cst tests has stfs instead of stfsx. */
-/* { dg-final { scan-assembler-times {\mstfs\M|\mstfsx\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mstfs\M|\mstfsx\M} 1 } } */
/* { dg-final { scan-assembler-times {\mlvx\M|\mlxv\M|\mlxvd2x\M|\mlxvw4x\M} 2 } } */
/* cst test has a lvewx,vperm combo */
/* { dg-final { scan-assembler-times {\mlvewx\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mvperm\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 3 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
index 93c263e04da..9b719a07916 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
@@ -20,13 +20,13 @@ testf_cst (float f, vector float vf)
}
/* var test has a load and store. */
-/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mstfsx\M} 1 { target lp64} } } */
+/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstfsx\M} 0 { target lp64} } } */
/* cst test have a xscvdpspn,xxextractuw,xxinsertw combo */
-/* { dg-final { scan-assembler-times {\mxscvdpspn\M} 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mxxextractuw\M} 1 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mxxinsertw\M} 1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mxscvdpspn\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mxxextractuw\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mxxinsertw\M} 2 { target lp64 } } } */
/* { dg-final { scan-assembler-times {\mstfs\M} 2 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlxv\M} 2 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c
index 4a3b1ae6fc1..6e4851de658 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p8.c
@@ -49,9 +49,10 @@ testui2_cst(unsigned int x, vector unsigned int v)
}
/* Each test has lvx (8). cst tests have additional lvewx. (4) */
-/* var tests have both stwx (4) and stvx (4). cst tests have stw (4).*/
-/* { dg-final { scan-assembler-times {\mstvx\M|\mstwx\M|\mstw\M|\mstxvw4x\M} 12 } } */
-/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 8 } } */
+/* var tests have no stwx and stvx. cst tests have stw (4).*/
+/* { dg-final { scan-assembler-times {\mstvx\M|\mstwx\M|\mstw\M|\mstxvw4x\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 8 { target le } } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 4 { target be } } } */
/* { dg-final { scan-assembler-times {\mlvewx\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mvperm\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 12 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
index 5ba5d53f276..50af92168f1 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
@@ -49,14 +49,13 @@ testui2_cst(unsigned int x, vector unsigned int v)
}
-/* load immediate, add, store, stb, load variable test. */
-/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mstwx\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 0 } } */
+/* { dg-final { scan-assembler-times {\mstwx\M} 0 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 0 { target lp64 } } } */
/* an insert and a move per constant test. */
-/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mxxinsertw\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mxxinsertw\M} 8 { target lp64 } } } */
/* { dg-final { scan-assembler-times {\maddi\M} 12 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c
index 337b38fb7d3..e003b76d0b9 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-longlong.c
@@ -60,13 +60,9 @@ testul2_cst(unsigned long long x, vector unsigned long long v)
/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 4 } } */
-/* The number of addi instructions decreases on newer systems. Measured as 8 on
- power7 and power8 targets, and drops to 4 on power9 targets that use the
- newer stxv,lxv instructions. For this test ensure we get at least one. */
-/* { dg-final { scan-assembler {\maddi\M} } } */
-/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mstdx\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstvx\M|\mstxv\M} 0 } } */
+/* { dg-final { scan-assembler-times {\mstdx\M} 0 { target lp64 } } } */
/* { dg-final { scan-assembler-times {\mstw\M} 8 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M|\mlxv\M|\mlvx\M} 0 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c
index 3ed40043095..d3faae018d7 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p8.c
@@ -48,10 +48,11 @@ testus2_cst(unsigned short x, vector unsigned short v)
return vec_insert(x, v, 12);
}
-/* { dg-final { scan-assembler-times {\mlhz\M|\mlvx\M|\mlxv\M|\mlxvw4x\M} 8 } } */
-/* stores.. 2 each per variable tests, 1 each per cst test. */
-/* { dg-final { scan-assembler-times {\msthx\M|\mstvx\M|\msth\M|\mstxvw4x\M} 12 } } */
+/* { dg-final { scan-assembler-times {\mlhz\M|\mlvx\M|\mlxv\M|\mlxvw4x\M} 8 { target le } } } */
+/* { dg-final { scan-assembler-times {\mlhz\M|\mlvx\M|\mlxv\M|\mlxvw4x\M} 4 { target be } } } */
+/* stores.. 0 per variable tests, 1 each per cst test. */
+/* { dg-final { scan-assembler-times {\msthx\M|\mstvx\M|\msth\M|\mstxvw4x\M} 4 } } */
/* { dg-final { scan-assembler-times {\mlvehx\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mvperm\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mvperm\M} 12 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
index f09fd21691c..d864a83ee0f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
@@ -48,11 +48,11 @@ testus2_cst(unsigned short x, vector unsigned short v)
return vec_insert(x, v, 12);
}
-/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 4 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mvinserth\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmtvsrwz\M} 8 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mvinserth\M} 8 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 4 { target lp64 }} } */
+/* { dg-final { scan-assembler-times {\mstxv\M|\mstvx\M} 0 } } */
+/* { dg-final { scan-assembler-times {\mlxv\M|\mlvx\M} 0 { target lp64 }} } */
/* -m32 uses sth/lvehx as part of the sequence. */
/* { dg-final { scan-assembler-times {\msth\M} 8 { target ilp32 }} } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
index 0780b01ffab..341cfb15555 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -193,8 +193,8 @@ vector unsigned __int128 splat_uint128 (unsigned __int128 x) { return vec_splats
/* { dg-final { scan-assembler-times {\mrldic\M} 0 { target { be && ilp32 } } } } */
/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target { be && lp64 } } } } */
/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target le } } } */
-/* { dg-final { scan-assembler-times "xxpermdi" 4 { target be } } } */
-/* { dg-final { scan-assembler-times "xxpermdi" 6 { target le } } } */
+/* { dg-final { scan-assembler-times "xxpermdi" 11 { target be } } } */
+/* { dg-final { scan-assembler-times "xxpermdi" 19 { target le } } } */
/* { dg-final { scan-assembler-times "vspltisb" 2 } } */
/* { dg-final { scan-assembler-times "vspltish" 2 } } */
/* { dg-final { scan-assembler-times "vspltisw" 2 } } */
--
2.25.1
next prev parent reply other threads:[~2020-10-10 8:08 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-10 8:08 [PATCH 0/4] rs6000: Enable variable vec_insert with IFN VEC_SET Xionghu Luo
2020-10-10 8:08 ` [PATCH 1/4] rs6000: Change rs6000_expand_vector_set param Xionghu Luo
2020-11-24 19:44 ` Segher Boessenkool
2020-10-10 8:08 ` [PATCH 2/4] rs6000: Support variable insert and Expand vec_insert in expander [PR79251] Xionghu Luo
2020-11-24 22:37 ` Segher Boessenkool
2020-10-10 8:08 ` [PATCH 3/4] rs6000: Enable vec_insert for P8 with rs6000_expand_vector_set_var_p8 Xionghu Luo
2020-11-27 1:04 ` Xionghu Luo
2020-12-03 14:16 ` Xionghu Luo
2020-12-10 3:32 ` Xionghu Luo
2020-12-23 2:18 ` Ping ^ 3: " Xionghu Luo
2021-01-15 2:48 ` Ping ^ 4: " Xionghu Luo
2021-01-21 23:48 ` Segher Boessenkool
2021-01-22 20:08 ` David Edelsohn
2020-10-10 8:08 ` Xionghu Luo [this message]
2021-01-22 0:17 ` [PATCH 4/4] rs6000: Update testcases' instruction count Segher Boessenkool
2021-01-22 20:02 ` David Edelsohn
2021-01-23 1:01 ` Segher Boessenkool
2021-01-23 1:24 ` David Edelsohn
2020-11-05 1:34 ` Ping: [PATCH 0/4] rs6000: Enable variable vec_insert with IFN VEC_SET Xionghu Luo
2020-11-13 2:05 ` Ping^2: " Xionghu Luo
2020-11-24 2:29 ` Ping^3: " Xionghu Luo
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