From: Michael Meissner <meissner@linux.ibm.com>
To: Michael Meissner <meissner@linux.ibm.com>,
gcc-patches@gcc.gnu.org,
Segher Boessenkool <segher@kernel.crashing.org>,
David Edelsohn <dje.gcc@gmail.com>,
Bill Schmidt <wschmidt@linux.ibm.com>,
Peter Bergner <bergner@linux.ibm.com>
Subject: Ping x2: [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.
Date: Thu, 10 Dec 2020 10:38:41 -0500 [thread overview]
Message-ID: <20201210153841.GD4728@ibm-toto.the-meissners.org> (raw)
In-Reply-To: <20201116045051.GA3952@ibm-toto.the-meissners.org>
This patch has been around for quite some time. It isn't critical for enabling
IEEE 128-bit long double, but it improves code generation for float128 on
power10.
I haven't received a reply for this patch:
| Date: Sun, 15 Nov 2020 23:50:51 -0500
| Subject: [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.
| Message-ID: <20201116045051.GA3952@ibm-toto.the-meissners.org>
| https://gcc.gnu.org/pipermail/gcc-patches/2020-November/559166.html
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797
next prev parent reply other threads:[~2020-12-10 15:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 4:45 [PATCH 0/2] Power10 IEEE 128-bit min, max, cmove Michael Meissner
2020-11-16 4:50 ` [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support Michael Meissner
2020-12-04 4:35 ` Ping: " Michael Meissner
2020-12-10 15:38 ` Michael Meissner [this message]
2020-11-16 4:53 ` [PATCH 2/2] Power10: Add IEEE 128-bit fp conditional move Michael Meissner
2020-12-04 4:37 ` Ping: " Michael Meissner
2020-12-10 15:40 ` Ping x2: " Michael Meissner
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