From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id F0FBA396EC55 for ; Fri, 15 Jan 2021 03:39:55 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org F0FBA396EC55 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 10F3Yodc162308; Thu, 14 Jan 2021 22:39:55 -0500 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3632y6gey0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 14 Jan 2021 22:39:54 -0500 Received: from m0098399.ppops.net (m0098399.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 10F3Z7Wo163840; Thu, 14 Jan 2021 22:39:54 -0500 Received: from ppma04dal.us.ibm.com (7a.29.35a9.ip4.static.sl-reverse.com [169.53.41.122]) by mx0a-001b2d01.pphosted.com with ESMTP id 3632y6gexq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 14 Jan 2021 22:39:54 -0500 Received: from pps.filterd (ppma04dal.us.ibm.com [127.0.0.1]) by ppma04dal.us.ibm.com (8.16.0.42/8.16.0.42) with SMTP id 10F3Ob64024552; Fri, 15 Jan 2021 03:39:53 GMT Received: from b01cxnp22036.gho.pok.ibm.com (b01cxnp22036.gho.pok.ibm.com [9.57.198.26]) by ppma04dal.us.ibm.com with ESMTP id 35y449vh21-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 15 Jan 2021 03:39:53 +0000 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 10F3dq6c9175650 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 15 Jan 2021 03:39:52 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 86573AE060; Fri, 15 Jan 2021 03:39:52 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 11692AE05C; Fri, 15 Jan 2021 03:39:52 +0000 (GMT) Received: from ibm-toto.the-meissners.org (unknown [9.160.46.99]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTPS; Fri, 15 Jan 2021 03:39:51 +0000 (GMT) Date: Thu, 14 Jan 2021 22:39:50 -0500 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Bill Schmidt , Peter Bergner Subject: [PATCH 1/3] PowerPC: Add long double target-supports. Message-ID: <20210115033950.GA31692@ibm-toto.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn , Bill Schmidt , Peter Bergner References: <20210115033758.GA5283@ibm-toto.the-meissners.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210115033758.GA5283@ibm-toto.the-meissners.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-15_01:2021-01-15, 2021-01-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxlogscore=999 impostorscore=0 clxscore=1015 mlxscore=0 spamscore=0 adultscore=0 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2101150015 X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, BIGNUM_EMAILS, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Jan 2021 03:39:57 -0000 [PATCH 1/3] PowerPC: Add long double target-supports. This patch add several more selections to target-supports.exp: * 3 selections for the current long double format; * 3 selections if we can change the long double format to a particular value. * 3 functions to return the options needed to switch the long double format for use with dg-add-options. I have run tests on a little endian power9 system with 3 compilers: * One compiler using the default IBM 128-bit format; * One compiler using the IEEE 128-bit format; (and) * One compiler using 64-bit long doubles. I have also tested compilers on a big endian power8 system with a compiler defaulting to power8 code generation and another with the default cpu set. Can I check this patch into the master branch? gcc/testsuite/ 2021-01-14 Michael Meissner * lib/target-supports.exp (check_effective_target_ppc_long_double_ibm128): New function. (check_effective_target_ppc_long_double_ieee128): New function. (check_effective_target_ppc_long_double_64bit): New function. (add_options_for_ppc_long_double_override_ibm128): New function. (check_effective_target_ppc_long_double_override_ibm128): New function. (add_options_for_ppc_long_double_override_ieee128): New function. (check_effective_target_ppc_long_double_override_ieee128): New function. (add_options_for_ppc_long_double_override_64bit): New function. (check_effective_target_ppc_long_double_override_64bit): New function. --- gcc/testsuite/lib/target-supports.exp | 155 ++++++++++++++++++++++++++ 1 file changed, 155 insertions(+) diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 47d4c45e9eb..2badb495adc 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2354,6 +2354,161 @@ proc check_effective_target_ppc_ieee128_ok { } { }] } +# See if the target is a powerpc with the long double format that uses the IBM +# extended double format. + +proc check_effective_target_ppc_long_double_ibm128 { } { + return [check_cached_effective_target ppc_long_double_ibm { + int main() + { + #if !defined(_ARCH_PPC) || !defined(__LONG_DOUBLE_IBM128__) + return 1; + #else + return 0; + #endif + } + }] +} + +# See if the target is a powerpc with the long double format that uses the IEEE +# 128-bit format. + +proc check_effective_target_ppc_long_double_ieee128 { } { + return [check_cached_effective_target ppc_long_double_ieee { + int main() + { + #if !defined(_ARCH_PPC) || !defined(__LONG_DOUBLE_IEEE128__) + return 1; + #else + return 0; + #endif + } + }] +} + +# See if the target is a powerpc with the long double format that is 64-bit. + +proc check_effective_target_ppc_long_double_64bit { } { + return [check_cached_effective_target ppc_long_double_64bit { + int main() + { + #ifndef _ARCH_PPC + return 1; + #else + return sizeof (long double) != 8; + #endif + } + }] +} + +# Like check_effective_target_ppc_long_double_ibm128, but check if we can +# explicitly override the long double format to use the IBM 128-bit extended +# double format, and GLIBC supports doing this override by switching the +# sprintf to handle long double. + +proc add_options_for_ppc_long_double_override_ibm128 { flags } { + if { [istarget powerpc*-*-*] } { + return "$flags -mlong-double-128 -Wno-psabi -mabi=ibmlongdouble" + } + return "$flags" +} + +proc check_effective_target_ppc_long_double_override_ibm128 { } { + return [check_runtime_nocache ppc_long_double_ovveride_ibm128 { + #include + #include + volatile __ibm128 a = (__ibm128) 3.0; + volatile long double one = 1.0L; + volatile long double two = 2.0L; + volatile long double b; + char buffer[20]; + int main() + { + #if !defined(_ARCH_PPC) || !defined(__LONG_DOUBLE_IBM128__) + return 1; + #else + b = one + two; + if (memcmp ((void *)&a, (void *)&b, sizeof (long double)) != 0) + return 1; + sprintf (buffer, "%lg", b); + return strcmp (buffer, "3") != 0; + #endif + } + } [add_options_for_ppc_long_double_override_ibm128 ""]] +} + +# Like check_effective_target_ppc_long_double_ieee, but check if we can +# explicitly override the long double format to use the IEEE 128-bit format, +# and GLIBC supports doing this override by switching the sprintf to handle +# long double. + +proc add_options_for_ppc_long_double_override_ieee128 { flags } { + if { [istarget powerpc*-*-*] } { + return "$flags -mlong-double-128 -Wno-psabi -mabi=ieeelongdouble" + } + return "$flags" +} + +proc check_effective_target_ppc_long_double_override_ieee128 { } { + return [check_runtime_nocache ppc_long_double_ovveride_ieee128 { + #include + #include + volatile _Float128 a = 3.0f128; + volatile long double one = 1.0L; + volatile long double two = 2.0L; + volatile long double b; + char buffer[20]; + int main() + { + #if !defined(_ARCH_PPC) || !defined(__LONG_DOUBLE_IEEE128__) + return 1; + #else + b = one + two; + if (memcmp ((void *)&a, (void *)&b, sizeof (long double)) != 0) + return 1; + sprintf (buffer, "%lg", b); + return strcmp (buffer, "3") != 0; + #endif + } + } [add_options_for_ppc_long_double_override_ieee128 ""]] +} + +# Like check_effective_target_ppc_long_double_64bit, but override the long +# double format to be 64-bit explicitly. + +proc add_options_for_ppc_long_double_override_64bit { flags } { + if { [istarget powerpc*-*-*] } { + return "$flags -mlong-double-64" + } + return "$flags" +} + +proc check_effective_target_ppc_long_double_override_64bit { } { + return [check_runtime_nocache ppc_long_double_ovveride_64bit { + #include + #include + volatile double a = 3.0; + volatile long double one = 1.0L; + volatile long double two = 2.0L; + volatile long double b; + char buffer[20]; + int main() + { + #if !defined(_ARCH_PPC) || defined(__LONG_DOUBLE_128__) + return 1; + #else + if (sizeof (long double) != sizeof (double)) + return 1; + b = one + two; + if (memcmp ((void *)&a, (void *)&b, sizeof (long double)) != 0) + return 1; + sprintf (buffer, "%lg", b); + return strcmp (buffer, "3") != 0; + #endif + } + } [add_options_for_ppc_long_double_override_64bit ""]] +} + # Return 1 if the target supports executing VSX instructions, 0 # otherwise. Cache the result. -- 2.22.0 -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.ibm.com, phone: +1 (978) 899-4797