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From: Jan Hubicka <hubicka@ucw.cz>
To: "H.J. Lu" <hjl.tools@gmail.com>
Cc: Hongtao Liu <hongtao.liu@intel.com>,
	GCC Patches <gcc-patches@gcc.gnu.org>,
	Hongyu Wang <hongyu.wang@intel.com>
Subject: Re: [PATCH v2 1/3] x86: Update memcpy/memset inline strategies for Ice Lake
Date: Wed, 31 Mar 2021 15:40:42 +0200	[thread overview]
Message-ID: <20210331134042.GC3851@kam.mff.cuni.cz> (raw)
In-Reply-To: <CAMe9rOpM7eupuZpgLzPiK_VwA+L+cR5tNsLgM=tH5UsxBst-hQ@mail.gmail.com>

> >
> > Patch is OK now.  I was wondering about using avx256 for moves of known
> 
> Done.   X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB is in now.   Can
> you take a look at the patch for Skylake:
> 
> https://gcc.gnu.org/pipermail/gcc-patches/2021-March/567096.html

I was wondering, if CPU preffers rep movsb when rcx is a compile time
constant, it probably does some logic at the decode time (i.e. expands
it into some sequence) and if so, then it may require the code setting
the register to be near rep (via fusing or simlar mechanism)

Perhaps we want to have fusing pattern for this, so we do not move them
far apart?
> 
> > size (per comment on MOVE_MAX_PIECES there is issue with
> > MAX_FIXED_MODE_SIZE, but that seems not hard to fix). Did you look into
> > it?
> 
> It requires some changes in the middle-end.   See

yep, I know - tried that too for zen3 tuning :)
> users/hjl/pieces/master branch:
> 
> https://gitlab.com/x86-gcc/gcc/-/tree/users/hjl/pieces/master
> 
> I am rebasing it.

Thanks, it would also help to reduce the code size bloat by bumping up
the move by pieces. Clang is using those.

Honza
> 
> -- 
> H.J.

  reply	other threads:[~2021-03-31 13:40 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-22 13:16 [PATCH 0/3] x86: Update memcpy/memset inline strategies H.J. Lu
2021-03-22 13:16 ` [PATCH 1/3] x86: Update memcpy/memset inline strategies for Ice Lake H.J. Lu
2021-03-22 14:10   ` Jan Hubicka
2021-03-22 23:57     ` [PATCH v2 " H.J. Lu
2021-03-29 13:43       ` H.J. Lu
2021-03-31  6:59       ` Richard Biener
2021-03-31  8:05       ` Jan Hubicka
2021-03-31 13:09         ` H.J. Lu
2021-03-31 13:40           ` Jan Hubicka [this message]
2021-03-31 13:47             ` Jan Hubicka
2021-03-31 15:41               ` H.J. Lu
2021-03-31 17:43                 ` Jan Hubicka
2021-03-31 17:54                   ` H.J. Lu
2021-04-01  5:57                     ` Hongyu Wang
2021-03-22 13:16 ` [PATCH 2/3] x86: Update memcpy/memset inline strategies for Skylake family CPUs H.J. Lu
2021-04-05 13:45   ` H.J. Lu
2021-04-05 21:14     ` Jan Hubicka
2021-04-05 21:53       ` H.J. Lu
2021-04-06  9:09         ` Hongyu Wang
2021-04-06  9:51           ` Jan Hubicka
2021-04-06 12:34             ` H.J. Lu
2021-03-22 13:16 ` [PATCH 3/3] x86: Update memcpy/memset inline strategies for -mtune=generic H.J. Lu
2021-03-22 13:29   ` Richard Biener
2021-03-22 13:38     ` H.J. Lu
2021-03-23  2:41       ` Hongyu Wang
2021-03-23  8:19         ` Richard Biener
2021-08-22 15:28           ` PING [PATCH] " H.J. Lu
2021-09-08  3:01             ` PING^2 " H.J. Lu
2021-09-13 13:38               ` H.J. Lu
2021-09-20 17:06                 ` PING^3 " H.J. Lu
2021-10-01 15:24                   ` PING^4 " H.J. Lu

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