Re: [PATCH 2/2] Add IEEE 128-bit min/max support on PowerPC

[Michael Meissner <meissner@linux.ibm.com>]

On Wed, Apr 14, 2021 at 02:38:47PM -0500, Segher Boessenkool wrote:
> On Fri, Apr 09, 2021 at 10:43:58AM -0400, Michael Meissner wrote:
> >         (Fv mode attribute): Add KFmode and TFmode.
> >         (mov<FPMASK:mode><FPMASK2:mode>cc_fpmask): Replace
> >         mov<SFDF:mode><SFDF2:mode>cc_p9.  Add IEEE 128-bit fp support.
> >         (mov<FPMASK:mode><FPMASK2:mode>cc_invert_fpmask): Replace
> >         mov<SFDF:mode><SFDF2:mode>cc_invert_p9.  Add IEEE 128-bit fp
> >         support.
> >         (fpmask<mode>): Add IEEE 128-bit fp support.  Enable generator to
> >         build te RTL.
> >         (xxsel<mode>): Add IEEE 128-bit fp support.  Enable generator to
> >         build te RTL.
> 
> > @@ -608,8 +621,13 @@ (define_mode_attr Ff		[(SF "f") (DF "d") (DI "d")])
> >  ; SF/DF constraint for arithmetic on VSX registers using instructions added in
> >  ; ISA 2.06 (power7).  This includes instructions that normally target DF mode,
> >  ; but are used on SFmode, since internally SFmode values are kept in the DFmode
> > -; format.
> > -(define_mode_attr Fv		[(SF "wa") (DF "wa") (DI "wa")])
> > +; format.  Also include IEEE 128-bit instructions which are restricted to the
> > +; Altivec registers.
> > +(define_mode_attr Fv		[(SF "wa")
> > +				 (DF "wa")
> > +				 (DI "wa")
> > +				 (KF "v")
> > +				 (TF "v")])
> 
> Eww.  Please just split the patterns.  Fv should just go away, it is
> always "wa" currently.  Removing that cascades to more cleanups, which
> is why I haven't done it yet, it takes time.

The problem is you have a combinatorial explosion.  Right now, there are two
patterns, one for the normal move, and one for the inverted move.  Without
doing a cascaded combination, you would need some 32 patterns to cover all of
the possibilities.

Or you give up on having a conditional move that compares one type and moves a
second:

	_Float128 a, b;
	double c, d, r;

	r = (a == b) ? c : d;

As I recall when I put the original logic in, there were a few places that did
this mixed comparison between SF/DF modes was used in real code.

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797