[PATCH 0/2] Add IEEE 128-bit min/max/conditional move

[Michael Meissner <meissner@linux.ibm.com>]

These patches add support for the XSMAXCQP, XSMINCQP, XSCMPEQQP, XSCMPGTQP, and
XSCMPGEQP instructions that were added to the PowerPC ISA 3.1 (power10).

These patches address the comments raised from the last version of the patches.

In this iteration, I simplified the first patch, eliminating a new macro.

The second patch I removed the support for conditional moves where the modes of
the operands being compared is different from the mode of the operands being
moved because this greatly complicated the patch.  This means you can do:

	_Float128 a, b, c, d, r;

	r = (a == b) ? c : d;

But you can't do:

	_Float128 c, d, r;
	double a, b;

	r = (a == b) ? c : d;

I did leave in the existing support for doing this mixed conditional move
between float/double, but I did not extended it for the two IEEE 128-bit
types.

I modified the test cases that I added to reflect this change.  I have also
fixed the test for not equal to use '!=' instead of '=='.

I have built bootstrap compilers on both a little endian power9 Linux system
and a big endian power8 Linux system.  There were no regressions in either
build in the test suites.  Can I check these changes into the trunk for gcc 11?

-- 
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.ibm.com, phone: +1 (978) 899-4797