From: Xiong Hu Luo <luoxhu@linux.ibm.com>
To: gcc-patches@gcc.gnu.org
Cc: segher@kernel.crashing.org, dje.gcc@gmail.com,
wschmidt@linux.ibm.com, guojiufu@linux.ibm.com,
linkw@gcc.gnu.org, Xiong Hu Luo <luoxhu@linux.ibm.com>
Subject: [PATCH] rs6000: Expand fmod and remainder when built with fast-math [PR97142]
Date: Fri, 16 Apr 2021 02:10:07 -0500 [thread overview]
Message-ID: <20210416071007.78812-1-luoxhu@linux.ibm.com> (raw)
fmod/fmodf and remainder/remainderf could be expanded instead of library
call when fast-math build, which is much faster.
fmodf:
fdivs f0,f1,f2
friz f0,f0
fnmsubs f1,f2,f0,f1
remainderf:
fdivs f0,f1,f2
frin f0,f0
fnmsubs f1,f2,f0,f1
gcc/ChangeLog:
2021-04-16 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/97142
* config/rs6000/rs6000.md (fmod<mode>3): New define_expand.
(remainder<mode>3): Likewise.
gcc/testsuite/ChangeLog:
2021-04-16 Xionghu Luo <luoxhu@linux.ibm.com>
PR target/97142
* gcc.target/powerpc/pr97142.c: New test.
---
gcc/config/rs6000/rs6000.md | 36 ++++++++++++++++++++++
gcc/testsuite/gcc.target/powerpc/pr97142.c | 30 ++++++++++++++++++
2 files changed, 66 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/pr97142.c
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index a1315523fec..7e0e94e6ba4 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -4902,6 +4902,42 @@ (define_insn "fre<sd>"
[(set_attr "type" "fp")
(set_attr "isa" "*,<Fisa>")])
+(define_expand "fmod<mode>3"
+ [(use (match_operand:SFDF 0 "gpc_reg_operand"))
+ (use (match_operand:SFDF 1 "gpc_reg_operand"))
+ (use (match_operand:SFDF 2 "gpc_reg_operand"))]
+ "TARGET_HARD_FLOAT
+ && TARGET_FPRND
+ && flag_unsafe_math_optimizations"
+{
+ rtx div = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_div<mode>3 (div, operands[1], operands[2]));
+
+ rtx friz = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_btrunc<mode>2 (friz, div));
+
+ emit_insn (gen_nfms<mode>4 (operands[0], operands[2], friz, operands[1]));
+ DONE;
+ })
+
+(define_expand "remainder<mode>3"
+ [(use (match_operand:SFDF 0 "gpc_reg_operand"))
+ (use (match_operand:SFDF 1 "gpc_reg_operand"))
+ (use (match_operand:SFDF 2 "gpc_reg_operand"))]
+ "TARGET_HARD_FLOAT
+ && TARGET_FPRND
+ && flag_unsafe_math_optimizations"
+{
+ rtx div = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_div<mode>3 (div, operands[1], operands[2]));
+
+ rtx frin = gen_reg_rtx (<MODE>mode);
+ emit_insn (gen_round<mode>2 (frin, div));
+
+ emit_insn (gen_nfms<mode>4 (operands[0], operands[2], frin, operands[1]));
+ DONE;
+ })
+
(define_insn "*rsqrt<mode>2"
[(set (match_operand:SFDF 0 "gpc_reg_operand" "=<Ff>,wa")
(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "<Ff>,wa")]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr97142.c b/gcc/testsuite/gcc.target/powerpc/pr97142.c
new file mode 100644
index 00000000000..48f25ca5b5b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr97142.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-Ofast" } */
+
+#include <math.h>
+
+float test1 (float x, float y)
+{
+ return fmodf (x, y);
+}
+
+double test2 (double x, double y)
+{
+ return fmod (x, y);
+}
+
+float test3 (float x, float y)
+{
+ return remainderf (x, y);
+}
+
+double test4 (double x, double y)
+{
+ return remainder (x, y);
+}
+
+/* { dg-final { scan-assembler-not {\mbl fmod\M} } } */
+/* { dg-final { scan-assembler-not {\mbl fmodf\M} } } */
+/* { dg-final { scan-assembler-not {\mbl remainder\M} } } */
+/* { dg-final { scan-assembler-not {\mbl remainderf\M} } } */
+
--
2.27.0.90.geebb51ba8c
next reply other threads:[~2021-04-16 7:13 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-16 7:10 Xiong Hu Luo [this message]
2021-05-06 2:36 ` Ping: " Xionghu Luo
2021-05-14 7:13 ` Xionghu Luo
2021-06-07 5:08 ` Ping^2: " Xionghu Luo
2021-06-30 1:44 ` Ping ^ 2: " Xionghu Luo
2021-07-09 18:40 ` will schmidt
2021-07-12 1:25 ` Xionghu Luo
2021-09-03 2:31 ` Xionghu Luo
2021-09-03 14:51 ` Bill Schmidt
2021-09-03 14:53 ` David Edelsohn
2021-09-03 21:44 ` Segher Boessenkool
2021-09-06 8:59 ` Xionghu Luo
2021-09-06 21:57 ` Segher Boessenkool
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