From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) by sourceware.org (Postfix) with ESMTPS id A0FFD389041B; Mon, 26 Apr 2021 12:45:58 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A0FFD389041B Received: by mail-ej1-f54.google.com with SMTP id r12so84233127ejr.5; Mon, 26 Apr 2021 05:45:58 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=9Ky0PaLz1A1vJISP8gaQYxRXYHDPogQpIK4W8JXu6Ag=; b=aLmj0+Jbp9RzrX280VBQLw/wqgLr6XIHkd/EzLBk5Pr3QeD7f/oGF07X65ey/sACGe CW+LKK57vbn+UlkdHu+ShqQ5DbyJXWQ8DnMKkSTVUA624CnStkM1guwSeL6RptwIo/Fi ckyllGPhoCL2ZVHyEqCYpkVy0kbqyIvACsnljrX5zCJuHHXx3vhFThOW0EVE9bpDde+e MNS9ci0naSAJWtMONoq37iip9KAtQyWikslTcoVMFsgaGLTWRkYCTCLYxt/YO47eD6hF qvBoeRcazefZ6tB9sgoT+mHGQ8gsaKyfZ5PrgzFVlWEd+dp+evHnHLy+AI5q37udM+VE UIsg== X-Gm-Message-State: AOAM5337Lqwl2BO1NjXd7uaQUfY/xI75nVtwvGl+a8LlzI1bai6X5PF8 ZJbkILIXkTXeDU9i0PEZbSE5LiNXAc8aJA== X-Google-Smtp-Source: ABdhPJwuZLfP9Dzwf+EHADYN/8sqN9PdQHESqQvhcDWorV+yKbCiLytim1jsmMv2eJd/LYN1aUQo3w== X-Received: by 2002:a17:906:55c5:: with SMTP id z5mr3229421ejp.306.1619441157436; Mon, 26 Apr 2021 05:45:57 -0700 (PDT) Received: from beast.fritz.box (62-178-178-158.cable.dynamic.surfer.at. [62.178.178.158]) by smtp.gmail.com with ESMTPSA id o20sm14126755eds.65.2021.04.26.05.45.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 05:45:57 -0700 (PDT) From: Christoph Muellner To: gcc-patches@gcc.gnu.org Cc: Jim Wilson , Kito Cheng , Christoph Muellner Subject: [PATCH 00/10] [RISC-V] Atomics improvements [PR100265/PR100266] Date: Mon, 26 Apr 2021 14:45:42 +0200 Message-Id: <20210426124552.3316789-1-cmuellner@gcc.gnu.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, KAM_DMARC_STATUS, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=no autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Apr 2021 12:46:00 -0000 This series provides a cleanup of the current atomics implementation of RISC-V: * PR100265: Use proper fences for atomic load/store * PR100266: Provide programmatic implementation of CAS As both are very related, I merged the patches into one series (to avoid merge issues if one overtake the other). The first patch could be squashed into the following patches, but I found it easier to understand the changes with it in place. The series has been tested as follows: * Building and testing a multilib RV32/64 toolchain (bootstrapped with riscv-gnu-toolchain repo) * Manual review of generated sequences for GCC's atomic builtins API The second part of the series (the re-implementation of CAS) benefits from a REE improvement (see PR100264): https://gcc.gnu.org/pipermail/gcc-patches/2021-April/568680.html If this patch is not in place, then an additional s.ext instruction is emitted after the SC.W (in case of RV64 and CAS for uint32_t). Christoph Muellner (10): RISC-V: Simplify memory model code [PR 100265] RISC-V: Emit proper memory ordering suffixes for AMOs [PR 100265] RISC-V: Eliminate %F specifier from riscv_print_operand() [PR 100265] RISC-V: Don't use amoswap for atomic stores [PR 100265] RISC-V: Emit fences according to chosen memory model [PR 100265] RISC-V: Implement atomic_{load,store} [PR 100265] RISC-V: Model INSNs for LR and SC [PR 100266] RISC-V: Add s.ext-consuming INSNs for LR and SC [PR 100266] RISC-V: Generate helpers for cbranch4 [PR 100266] RISC-V: Provide programmatic implementation of CAS [PR 100266] gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv.c | 134 +++++++++++++--------- gcc/config/riscv/riscv.md | 2 +- gcc/config/riscv/sync.md | 190 ++++++++++++++++++++++---------- 4 files changed, 215 insertions(+), 112 deletions(-) -- 2.31.1