From: "H.J. Lu" <hjl.tools@gmail.com>
To: gcc-patches@gcc.gnu.org
Subject: [PATCH 04/12] x86: Avoid stack realignment when copying data
Date: Thu, 29 Apr 2021 05:54:07 -0700 [thread overview]
Message-ID: <20210429125415.1634118-5-hjl.tools@gmail.com> (raw)
In-Reply-To: <20210429125415.1634118-1-hjl.tools@gmail.com>
Pass UNITS_PER_WORD * BITS_PER_UNIT to force_reg, when copying data from
one memory location to another with vector registers, to avoid stack
realignment.
* config/i386/i386-expand.c (ix86_expand_vector_move): Pass
UNITS_PER_WORD * BITS_PER_UNIT to force_reg when copying data
from one memory location to another.
---
gcc/config/i386/i386-expand.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c
index 1942b46efbf..b3c9b94f717 100644
--- a/gcc/config/i386/i386-expand.c
+++ b/gcc/config/i386/i386-expand.c
@@ -431,7 +431,12 @@ ix86_expand_vector_move (machine_mode mode, rtx operands[])
&& !register_operand (op0, mode)
&& !register_operand (op1, mode))
{
- emit_move_insn (op0, force_reg (GET_MODE (op0), op1));
+ /* NB: Don't increase stack alignment requirement when forcing
+ operand1 into a pseudo register to copy data from one memory
+ location to another since it doen't require spill. */
+ emit_move_insn (op0,
+ force_reg (GET_MODE (op0), op1,
+ (UNITS_PER_WORD * BITS_PER_UNIT)));
return;
}
--
2.31.1
next prev parent reply other threads:[~2021-04-29 12:54 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-29 12:54 [PATCH 00/12] Allow TImode/OImode/XImode in op_by_pieces operations H.J. Lu
2021-04-29 12:54 ` [PATCH 01/12] Update alignment_for_piecewise_move H.J. Lu
2021-04-30 8:59 ` Richard Sandiford
2021-04-29 12:54 ` [PATCH 02/12] Allow generating pseudo register with specific alignment H.J. Lu
2021-04-30 9:06 ` Richard Sandiford
2021-04-30 12:06 ` H.J. Lu
2021-04-30 12:42 ` Richard Sandiford
2021-04-30 12:49 ` H.J. Lu
2021-04-30 13:34 ` H.J. Lu
2021-04-30 15:56 ` Richard Sandiford
2021-04-30 17:33 ` H.J. Lu
2021-05-03 8:18 ` Richard Biener
2021-05-10 9:39 ` Richard Sandiford
2021-05-10 13:29 ` H.J. Lu
2021-05-10 13:59 ` Richard Biener
2021-05-10 14:11 ` H.J. Lu
2021-05-10 16:23 ` Richard Sandiford
2021-05-11 6:06 ` Richard Biener
2021-04-29 12:54 ` [PATCH 03/12] Add TARGET_READ_MEMSET_VALUE/TARGET_GEN_MEMSET_VALUE H.J. Lu
2021-04-29 12:54 ` H.J. Lu [this message]
2021-04-29 12:54 ` [PATCH 05/12] Remove MAX_BITSIZE_MODE_ANY_INT H.J. Lu
2021-04-29 12:54 ` [PATCH 06/12] x86: Update piecewise move and store H.J. Lu
2021-04-29 12:54 ` [PATCH 07/12] x86: Add AVX2 tests for PR middle-end/90773 H.J. Lu
2021-04-29 12:54 ` [PATCH 08/12] x86: Add tests for piecewise move and store H.J. Lu
2021-04-29 12:54 ` [PATCH 09/12] x86: Also pass -mno-avx to pr72839.c H.J. Lu
2021-04-29 12:54 ` [PATCH 10/12] x86: Also pass -mno-avx to cold-attribute-1.c H.J. Lu
2021-04-29 12:54 ` [PATCH 11/12] x86: Also pass -mno-avx to sw-1.c for ia32 H.J. Lu
2021-04-29 12:54 ` [PATCH 12/12] x86: Update gcc.target/i386/incoming-11.c H.J. Lu
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