From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out30-133.freemail.mail.aliyun.com (out30-133.freemail.mail.aliyun.com [115.124.30.133]) by sourceware.org (Postfix) with ESMTPS id 4EBB6385782F for ; Fri, 30 Apr 2021 13:04:54 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 4EBB6385782F X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R191e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=e01e04423; MF=gengqi@linux.alibaba.com; NM=1; PH=DS; RN=3; SR=0; TI=SMTPD_---0UXGcqwQ_1619787890; Received: from ITEB-L-PF1LDBR8.hz.ali.com(mailfrom:gengqi@linux.alibaba.com fp:SMTPD_---0UXGcqwQ_1619787890) by smtp.aliyun-inc.com(127.0.0.1); Fri, 30 Apr 2021 21:04:51 +0800 From: Geng Qi To: gcc-patches@gcc.gnu.org, cooper.qu@linux.alibaba.com Cc: Geng Qi Subject: [PATCH] C-SKY: Support for fpuv2:fldrd/fstrd and fpuv3:fldr.64/fstr.64. Date: Fri, 30 Apr 2021 21:04:08 +0800 Message-Id: <20210430130408.1865-1-gengqi@linux.alibaba.com> X-Mailer: git-send-email 2.22.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-21.8 required=5.0 tests=BAYES_00, ENV_AND_HDR_SPF_MATCH, GIT_PATCH_0, KAM_DMARC_STATUS, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, UNPARSEABLE_RELAY, USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 30 Apr 2021 13:04:56 -0000 gcc/ChangeLog: * config/csky/csky.c (ck810_legitimate_index_p): Modified for support "base + index" with DF mode. * config/csky/constraints.md ("Y"): New constraint for memory operands without index register. * config/csky/csky_insn_fpuv2.md (fpuv3_movdf):At constraints, use "Y" instead of "m" where mov between memory and general registers, and put them baskwards. * config/csky/csky_insn_fpuv3.md (fpuv2_movdf): Likewise. --- gcc/config/csky/constraints.md | 4 ++++ gcc/config/csky/csky.c | 3 ++- gcc/config/csky/csky_insn_fpuv2.md | 4 ++-- gcc/config/csky/csky_insn_fpuv3.md | 16 ++++++++-------- 4 files changed, 16 insertions(+), 11 deletions(-) diff --git a/gcc/config/csky/constraints.md b/gcc/config/csky/constraints.md index c9bc9f2..2641ab3 100644 --- a/gcc/config/csky/constraints.md +++ b/gcc/config/csky/constraints.md @@ -38,6 +38,10 @@ "Memory operands with base register, index register" (match_test "csky_valid_mem_constraint_operand (op, \"W\")")) +(define_memory_constraint "Y" + "Memory operands without index register" + (not (match_test "csky_valid_mem_constraint_operand (op, \"W\")"))) + (define_constraint "R" "Memory operands whose address is a label_ref" (and (match_code "mem") diff --git a/gcc/config/csky/csky.c b/gcc/config/csky/csky.c index e4c92fe..e55821f 100644 --- a/gcc/config/csky/csky.c +++ b/gcc/config/csky/csky.c @@ -3136,7 +3136,8 @@ ck810_legitimate_index_p (machine_mode mode, rtx index, int strict_p) /* The follow index is for ldr instruction, the ldr cannot load dword data, so the mode size should not be larger than 4. */ - else if (GET_MODE_SIZE (mode) <= 4) + else if (GET_MODE_SIZE (mode) <= 4 + || (TARGET_HARD_FLOAT && CSKY_VREG_MODE_P (mode))) { if (is_csky_address_register_rtx_p (index, strict_p)) return 1; diff --git a/gcc/config/csky/csky_insn_fpuv2.md b/gcc/config/csky/csky_insn_fpuv2.md index 0a680f8..5a06b22 100644 --- a/gcc/config/csky/csky_insn_fpuv2.md +++ b/gcc/config/csky/csky_insn_fpuv2.md @@ -461,8 +461,8 @@ ) (define_insn "*fpuv2_movdf" - [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m, v,?r,Q,v,v,v") - (match_operand:DF 1 "general_operand" " r,m,mF,r,?r, v,v,Q,v,m"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v,r, r,Y") + (match_operand:DF 1 "general_operand" " r,?r, v,v,Q,v,m,Y,YF,r"))] "CSKY_ISA_FEATURE (fpv2_df)" "* return csky_output_movedouble(operands, DFmode);" [(set (attr "length") diff --git a/gcc/config/csky/csky_insn_fpuv3.md b/gcc/config/csky/csky_insn_fpuv3.md index 053673c..7849795 100644 --- a/gcc/config/csky/csky_insn_fpuv3.md +++ b/gcc/config/csky/csky_insn_fpuv3.md @@ -71,27 +71,27 @@ ) (define_insn "*fpv3_movdf" - [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r, r,m,v,?r,Q,v,v,v, v") - (match_operand:DF 1 "general_operand" " r,m,mF,r,?r,v,v,Q,v,m,Dv"))] + [(set (match_operand:DF 0 "nonimmediate_operand" "=r, v,?r,Q,v,v,v, v,r, r,Y") + (match_operand:DF 1 "general_operand" " r,?r, v,v,Q,v,m,Dv,Y,YF,r"))] "CSKY_ISA_FEATURE(fpv3_df)" "* switch (which_alternative) { - case 4: + case 1: if (TARGET_BIG_ENDIAN) return \"fmtvr.64\\t%0, %R1, %1\"; return \"fmtvr.64\\t%0, %1, %R1\"; - case 5: + case 2: if (TARGET_BIG_ENDIAN) return \"fmfvr.64\\t%R0, %0, %1\"; return \"fmfvr.64\\t%0, %R0, %1\"; + case 3: + case 4: case 6: - case 7: - case 9: return fpuv3_output_move(operands); - case 8: + case 5: return \"fmov.64\\t%0, %1\"; - case 10: + case 7: return \"fmovi.64\\t%0, %1\"; default: return csky_output_movedouble(operands, DFmode); -- 2.7.4