[PATCH 1/4] [committed] arc: Fix documentation __builtin_arc_sr

[PATCH 1/4] [committed] arc: Fix documentation __builtin_arc_sr

[Claudiu Zissulescu]

The arguments of __builtin_arc_sr are swapped in documentation. Fix it.

gcc/
2021-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* doc/extend.texi (__builtin_arc_sr): Swap arguments.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---
 gcc/doc/extend.texi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index fd9175d1b3b..826804e6149 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -14709,12 +14709,12 @@ sleep  @var{a}
 @end example
 @end deftypefn
 
-@deftypefn {Built-in Function}  void __builtin_arc_sr (unsigned int @var{auxr}, unsigned int @var{val})
-The first argument, @var{auxv}, is the address of an auxiliary
-register, the second argument, @var{val}, is a compile time constant
-to be written to the register.  Generates:
+@deftypefn {Built-in Function}  void __builtin_arc_sr (unsigned int @var{val}, unsigned int @var{auxr})
+The first argument, @var{val}, is a compile time constant to be
+written to the register, the second argument, @var{auxr}, is the
+address of an auxiliary register.  Generates:
 @example
-sr  @var{auxr}, [@var{val}]
+sr  @var{val}, [@var{auxr}]
 @end example
 @end deftypefn
 
-- 
2.30.2

[PATCH 2/4] [committed] arc: Add alternative names for gp and fp registers.

[Claudiu Zissulescu]

Add alternative register name r26 for gp register, and add
alternative register name r27 for fp register.

gcc/
2021-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.h (ADDITIONAL_REGISTER_NAMES): Add r26 and r27.
---
 gcc/config/arc/arc.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index bbb362504cc..b7b34734f24 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -1193,6 +1193,8 @@ extern char rname56[], rname57[], rname58[], rname59[];
 
 #define ADDITIONAL_REGISTER_NAMES		\
 {						\
+  {"r26",    26},				\
+  {"r27",    27},				\
   {"ilink",  29},				\
   {"r29",    29},				\
   {"r30",    30},				\
-- 
2.30.2

[PATCH 3/4] [committed] arc: Update ctz/clz patterns

[Claudiu Zissulescu]

ARCv2 ISA introduces special clz/ctz instructions. This patch is
adding support for them when available.

Corner case:
mov            r0,0x0 : (w0) r0 <= 0x00000000 *
ffs            r1,r0 : (w0) r1 <= 0x0000001f *
fls            r2,r0 : (w0) r2 <= 0x00000000 *

gcc/
2021-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc/config/arc/arc.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
	(CTZ_DEFINED_VALUE_AT_ZERO): Likewise.
	* gcc/config/arc/arc.md (clrsbsi2): Cleanup pattern.
	(norm_f): Likewise.
	(ffs): Likewise.
	(ffs_f): Likewise.
	(clzsi2): Use fls instruction when available.
	(arc_clzsi2): Likewise.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---
 gcc/config/arc/arc.h  |  6 +++++
 gcc/config/arc/arc.md | 53 ++++++++++++++++++++++++-------------------
 2 files changed, 36 insertions(+), 23 deletions(-)

diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
index b7b34734f24..bd1fe0abd7a 100644
--- a/gcc/config/arc/arc.h
+++ b/gcc/config/arc/arc.h
@@ -1445,6 +1445,12 @@ do { \
 */
 #define SHIFT_COUNT_TRUNCATED 1
 
+/* Defines if the CLZ result is undefined or has a useful value.  */
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 31, 2)
+
+/* Defines if the CTZ result is undefined or has a useful value.  */
+#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 31, 2)
+
 /* We assume that the store-condition-codes instructions store 0 for false
    and some other value for true.  This is the value stored for true.  */
 #define STORE_FLAG_VALUE 1
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index 7a52551eef5..f3efe65ca2f 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -4396,24 +4396,20 @@ (define_peephole2
 ;; Instructions generated through builtins
 
 (define_insn "clrsbsi2"
-  [(set (match_operand:SI  0 "dest_reg_operand" "=w,w")
-	(clrsb:SI (match_operand:SI 1 "general_operand" "cL,Cal")))]
+  [(set (match_operand:SI  0 "dest_reg_operand" "=r,r")
+	(clrsb:SI (match_operand:SI 1 "general_operand" "rL,Cal")))]
   "TARGET_NORM"
-  "@
-   norm \t%0, %1
-   norm \t%0, %1"
+  "norm\\t%0,%1"
   [(set_attr "length" "4,8")
    (set_attr "type" "two_cycle_core,two_cycle_core")])
 
 (define_insn "norm_f"
-  [(set (match_operand:SI  0 "dest_reg_operand" "=w,w")
-	(clrsb:SI (match_operand:SI 1 "general_operand" "cL,Cal")))
+  [(set (match_operand:SI  0 "dest_reg_operand" "=r,r")
+	(clrsb:SI (match_operand:SI 1 "general_operand" "rL,Cal")))
    (set (reg:CC_ZN CC_REG)
 	(compare:CC_ZN (match_dup 1) (const_int 0)))]
   "TARGET_NORM"
-  "@
-   norm.f\t%0, %1
-   norm.f\t%0, %1"
+  "norm.f\\t%0,%1"
   [(set_attr "length" "4,8")
    (set_attr "type" "two_cycle_core,two_cycle_core")])
 
@@ -4443,7 +4439,17 @@ (define_expand "clzsi2"
 	  (clz:SI (match_operand:SI 1 "register_operand" "")))
      (clobber (match_dup 2))])]
   "TARGET_NORM"
-  "operands[2] = gen_rtx_REG (CC_ZNmode, CC_REG);")
+  "
+   if (TARGET_V2)
+    {
+      /* ARCv2's FLS is a bit more optimal than using norm.  */
+      rtx tmp = gen_reg_rtx (SImode);
+      emit_insn (gen_fls (tmp, operands[1]));
+      emit_insn (gen_subsi3 (operands[0], GEN_INT (31), tmp));
+      DONE;
+    }
+   operands[2] = gen_rtx_REG (CC_ZNmode, CC_REG);
+  ")
 
 (define_insn_and_split "*arc_clzsi2"
   [(set (match_operand:SI 0 "register_operand" "=r")
@@ -4475,8 +4481,13 @@ (define_expand "ctzsi2"
    (match_operand:SI 1 "register_operand" "")]
   "TARGET_NORM"
   "
-  emit_insn (gen_arc_ctzsi2 (operands[0], operands[1]));
-  DONE;
+   if (TARGET_V2)
+    {
+      emit_insn (gen_ffs (operands[0], operands[1]));
+      DONE;
+    }
+   emit_insn (gen_arc_ctzsi2 (operands[0], operands[1]));
+   DONE;
 ")
 
 (define_insn_and_split "arc_ctzsi2"
@@ -5575,26 +5586,22 @@ (define_insn "clri"
    (set_attr "type" "misc")])
 
 (define_insn "ffs"
-  [(set (match_operand:SI  0 "dest_reg_operand" "=w,w")
-	(unspec:SI [(match_operand:SI 1 "general_operand" "cL,Cal")]
+  [(set (match_operand:SI  0 "dest_reg_operand" "=r,r")
+	(unspec:SI [(match_operand:SI 1 "general_operand" "rL,Cal")]
 			    UNSPEC_ARC_FFS))]
   "TARGET_NORM && TARGET_V2"
-  "@
-   ffs \t%0, %1
-   ffs \t%0, %1"
+  "ffs\\t%0,%1"
   [(set_attr "length" "4,8")
    (set_attr "type" "two_cycle_core,two_cycle_core")])
 
 (define_insn "ffs_f"
-  [(set (match_operand:SI  0 "dest_reg_operand" "=w,w")
-	(unspec:SI [(match_operand:SI 1 "general_operand" "cL,Cal")]
+  [(set (match_operand:SI  0 "dest_reg_operand" "=r,r")
+	(unspec:SI [(match_operand:SI 1 "general_operand" "rL,Cal")]
 			    UNSPEC_ARC_FFS))
    (set (reg:CC_ZN CC_REG)
 	(compare:CC_ZN (match_dup 1) (const_int 0)))]
   "TARGET_NORM && TARGET_V2"
-  "@
-   ffs.f\t%0, %1
-   ffs.f\t%0, %1"
+  "ffs.f\\t%0,%1"
   [(set_attr "length" "4,8")
    (set_attr "type" "two_cycle_core,two_cycle_core")])
 
-- 
2.30.2

[PATCH 4/4] [committed] arc: Fix compilation warnings.

[Claudiu Zissulescu]

gcc/
2021-05-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* common/config/arc/arc-common.c (arc_handle_option): Remove dot
	from string.
	* config/arc/arc.c (arc_reorg): Remove underscore from string.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
---
 gcc/common/config/arc/arc-common.c | 2 +-
 gcc/config/arc/arc.c               | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/common/config/arc/arc-common.c b/gcc/common/config/arc/arc-common.c
index d5229ae7146..86674dd3de7 100644
--- a/gcc/common/config/arc/arc-common.c
+++ b/gcc/common/config/arc/arc-common.c
@@ -84,7 +84,7 @@ arc_handle_option (struct gcc_options *opts,
 	 our caller, so comparing arc_cpu with PROCESSOR_NONE is pointless.  */
 
       if (mcpu_seen != PROCESSOR_NONE && mcpu_seen != value)
-	warning_at (loc, 0, "multiple %<-mcpu=%> options specified.");
+	warning_at (loc, 0, "multiple %<-mcpu=%> options specified");
       mcpu_seen = value;
       break;
 
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 3201c3fefd7..ec7328edb5a 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -8433,7 +8433,7 @@ arc_reorg (void)
 
       if (!INSN_ADDRESSES_SET_P())
 	  fatal_error (input_location,
-		       "insn addresses not set after shorten_branches");
+		       "insn addresses not set after shorten branches");
 
       for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
 	{
-- 
2.30.2